| Message ID | 1370520415-5598-1-git-send-email-julien.grall@linaro.org |
|---|---|
| State | Rejected, archived |
| Headers | show |
At 13:06 +0100 on 06 Jun (1370524015), Julien Grall wrote: > According to the ARM manual, T0SZ is a 4-bit signed integer. > The current value of T0SZ = b1000 which is equal to -7. This is result Really? By my count, 4-bit -7 is b1001 and b1000 is indeed -8. > to a size of 2^39 bytes instead of the desired value 2^40. > > Signed-off-by: Julien Grall <julien.grall@linaro.org> > --- > xen/arch/arm/mm.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c > index d1290cd..7d4e186 100644 > --- a/xen/arch/arm/mm.c > +++ b/xen/arch/arm/mm.c > @@ -315,9 +315,9 @@ void __cpuinit setup_virt_paging(void) > /* Setup Stage 2 address translation */ > /* SH0=00, ORGN0=IRGN0=01 > * SL0=01 (Level-1) > - * T0SZ=(1)1000 = -8 (40 bit physical addresses) > + * T0SZ=(1)1111 = -8 (40 bit physical addresses) That's certainly wrong: b1111 must be -1. Tim. > */ > - WRITE_SYSREG32(0x80002558, VTCR_EL2); isb(); > + WRITE_SYSREG32(0x8000255f, VTCR_EL2); isb(); > } > > /* This needs to be a macro to stop the compiler spilling to the stack > -- > 1.7.10.4 > > > _______________________________________________ > Xen-devel mailing list > Xen-devel@lists.xen.org > http://lists.xen.org/xen-devel
On Thu, 6 Jun 2013, Tim Deegan wrote: > At 13:06 +0100 on 06 Jun (1370524015), Julien Grall wrote: > > According to the ARM manual, T0SZ is a 4-bit signed integer. > > The current value of T0SZ = b1000 which is equal to -7. This is result > > Really? By my count, 4-bit -7 is b1001 and b1000 is indeed -8. Tim is right on this one: https://en.wikipedia.org/wiki/Two%27s_complement > > to a size of 2^39 bytes instead of the desired value 2^40. > > > > Signed-off-by: Julien Grall <julien.grall@linaro.org> > > --- > > xen/arch/arm/mm.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c > > index d1290cd..7d4e186 100644 > > --- a/xen/arch/arm/mm.c > > +++ b/xen/arch/arm/mm.c > > @@ -315,9 +315,9 @@ void __cpuinit setup_virt_paging(void) > > /* Setup Stage 2 address translation */ > > /* SH0=00, ORGN0=IRGN0=01 > > * SL0=01 (Level-1) > > - * T0SZ=(1)1000 = -8 (40 bit physical addresses) > > + * T0SZ=(1)1111 = -8 (40 bit physical addresses) > > That's certainly wrong: b1111 must be -1. right > > */ > > - WRITE_SYSREG32(0x80002558, VTCR_EL2); isb(); > > + WRITE_SYSREG32(0x8000255f, VTCR_EL2); isb(); > > } > > > > /* This needs to be a macro to stop the compiler spilling to the stack > > -- > > 1.7.10.4 > > > > > > _______________________________________________ > > Xen-devel mailing list > > Xen-devel@lists.xen.org > > http://lists.xen.org/xen-devel >
On 06/06/2013 02:17 PM, Tim Deegan wrote: > At 13:06 +0100 on 06 Jun (1370524015), Julien Grall wrote: >> According to the ARM manual, T0SZ is a 4-bit signed integer. >> The current value of T0SZ = b1000 which is equal to -7. This is result > > Really? By my count, 4-bit -7 is b1001 and b1000 is indeed -8. Indeed :/. I don't know why I find this value by hand.
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index d1290cd..7d4e186 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -315,9 +315,9 @@ void __cpuinit setup_virt_paging(void) /* Setup Stage 2 address translation */ /* SH0=00, ORGN0=IRGN0=01 * SL0=01 (Level-1) - * T0SZ=(1)1000 = -8 (40 bit physical addresses) + * T0SZ=(1)1111 = -8 (40 bit physical addresses) */ - WRITE_SYSREG32(0x80002558, VTCR_EL2); isb(); + WRITE_SYSREG32(0x8000255f, VTCR_EL2); isb(); } /* This needs to be a macro to stop the compiler spilling to the stack
According to the ARM manual, T0SZ is a 4-bit signed integer. The current value of T0SZ = b1000 which is equal to -7. This is result to a size of 2^39 bytes instead of the desired value 2^40. Signed-off-by: Julien Grall <julien.grall@linaro.org> --- xen/arch/arm/mm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)