From patchwork Fri Oct 18 15:41:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 176865 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp1031292ill; Fri, 18 Oct 2019 08:43:38 -0700 (PDT) X-Google-Smtp-Source: APXvYqwPjpvoggChiBuA5IwIdEgeDnlHO4IS1GTMykRBxnKoh7wn2RR4kkNPVKkrtnfzKrfDpTec X-Received: by 2002:a50:d54c:: with SMTP id f12mr10267446edj.116.1571413417878; Fri, 18 Oct 2019 08:43:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571413417; cv=none; d=google.com; s=arc-20160816; b=cGzmu/sCe6VwHo/Q6Qc0P+qSSuY0m4SZxfFoEdUg6/KjkRURTAPqezv7a0Yucpx/Uh DgD5HvOfosp2q5bS8VYhGd6TknHop/EKVi/3aHD+hP61rYEbnZLQgDqh7nB5zn5lsx61 Vp9lyRbYBS/RZLQAUzQL6tJGQXizoxg3Zgv8N7u6NCAkUUFLCMAsBfen4gH0b04m6+nk gROf3hhbbfdxl0Lkgn+ZchcbWHufDDc9Gju4svYjkk3cuD5vPEseybDX1SPCe8zdi/YH DpqyYmL9uIf5I+3eLWQwmMEU83LfkVkzUndYu+o1IWhfTZu2bl5pE0Dd2x0sC8R66PL1 C/Zw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=NJ1KHfT75rQ0NbZaAO2fvlfYG8SFmkcrsEl9rgtBGjk=; b=gZQartIdUyzsYofUi4ew9xdlnAj49iQWPhhKO+Tmf+nIp5Ty1aJa6x07exA/IG/qMr GkgjuzCHfBuFvGlrLSLx5+K8LLwYn/8gX6YeVKr86mPx1N8Mqw3kfeSYLFqBgt2b+J2Y 94+7DIVbSJ4x0rwzjptYWLWoGaXmLg3sIVna5m9P/CDifwfeB9yTBMy6+ukvRNSbabPx afI6+YnP6Pc/OEO/HBnGyFn+2+GS5bA02UQrS07aQrjz5Y8M0vPKvTDyZIHjj4KnhJp4 377Pz6nDJMBcEj3VzXYryIo3Qrh/N53xqZO08gGlh3kRNiByOtlitE3K4jzKRAeKmfcd 1pTw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w10si3880205edv.21.2019.10.18.08.43.37; Fri, 18 Oct 2019 08:43:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2505360AbfJRPnf (ORCPT + 26 others); Fri, 18 Oct 2019 11:43:35 -0400 Received: from mout.kundenserver.de ([217.72.192.74]:38795 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2505238AbfJRPmu (ORCPT ); Fri, 18 Oct 2019 11:42:50 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue108 [212.227.15.145]) with ESMTPA (Nemesis) id 1N6bo8-1hyk0j1pkM-0183vP; Fri, 18 Oct 2019 17:42:35 +0200 From: Arnd Bergmann To: Daniel Mack , Haojian Zhuang , Robert Jarzmik Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Linus Walleij , Arnd Bergmann Subject: [PATCH 42/46] ARM: pxa: remove unused mach/bitfield.h Date: Fri, 18 Oct 2019 17:41:57 +0200 Message-Id: <20191018154201.1276638-42-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20191018154052.1276506-1-arnd@arndb.de> References: <20191018154052.1276506-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:MawNLkONnTydx3voDjASMOY1YX3Q2HFVw/Zx1i20aZcAxlZEQN3 PwIvYpFxW385uKg533nwuZQJHTZVOQotsI4pLrM5FSiS2EsTxEFQu6KUaDZVlxVHBuRKj40 2g6G4rU4ofriBDld+bP1ghms0VKDjH2yfcN4aS+fxyqPRATnboOYEoVWz+uhM4VHQ3ppZul 62L7T93fEWV3yRyeJ1HHg== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:dlPhYoGbnPE=:dowJAAvRTybL/BGzSRUYDS otpbXyH8f8ZrraQvf4YNp0Y4SQLUuy+oEW6TszPqh/Gh9OtCYCMHRcySuZxAgVNBCazhT+fTc UPuvU03Y8pZYxbNCKqvrLQ+rJSc4aGBpW9vHUArv9eVBJ0OcYmKH3Z2wv2qk82sHwrL/oZxzl J8VpWJzCEUueo0tfIgtGd7val5Qg5B87BIxk0xnf13XRb/wLtdzJ1OcwfoKORy96OwvMmH99O czBV1iKdwQ2SsNcDE5cGZdu0ExatpjlLlpCXcxKblP3NJpG0qbMzzgC3/mGcjXV0gpi+664q9 JbzFIT6eokQbtfieEVcAu4J4Xr+mJBcrun1WlhdFKrP2CS/CC5tpmlWjUpo64IX0nosxK0zGy MJ2fUjjNKvqYJ/UI2AaCSj48juuOIOi8yB4T96rZNdKH2IylrUHatFYLVuLCcq+nVplzBcciE Rh1I64NEciPR5ylbCwf9GVD5kuJ/h4bykOJBNRgjRCCQanS+SrjK6B+YsmS5vHg3f/8bBci5I 8umJjsrwnrJqtsixmUJfECdl5o5KMgrL+8x7yRc+3cv5zFNbXIZ0kwXBuU33W26LxzZFW2uyE SbhQHspPaXZ4+mWgsV9tPkFEkOo38If05TLfzmZYlE8MfK3v81wScmDlFnBxQAa4c3qA3xOKm 2x93cH5hwbxO0vFCG5DKhApChtud7qiSdL4IVIQ/CY/0K3dHfammCmjiEFsOANEXSE+9z9yC5 MRnpXCA0iChkccbIRJCxjevyfIiHTBaMCAi/1DVgjNQ+g4CA2blahgeeniLyd3unnwFvG20aM RvX2ZtPJE9MyF4EIYhGL3KCOtVup4aKKjy+P2I1QlsykGOqdaGEOWXqf+dNtg0OsJWgoVx/l4 eiMXHgRWL8vILs8HkCWw== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The sa1111.h header defines some constants using the bitfield macros, but those are only used on sa1100, not on pxa, and the users include the bitfield header through mach/hardware.h. Signed-off-by: Arnd Bergmann Acked-by: Robert Jarzmik --- arch/arm/include/asm/hardware/sa1111.h | 2 - arch/arm/mach-pxa/include/mach/bitfield.h | 114 ---------------------- 2 files changed, 116 deletions(-) delete mode 100644 arch/arm/mach-pxa/include/mach/bitfield.h -- 2.20.0 diff --git a/arch/arm/include/asm/hardware/sa1111.h b/arch/arm/include/asm/hardware/sa1111.h index d134b9a5ff94..dc8850238e2b 100644 --- a/arch/arm/include/asm/hardware/sa1111.h +++ b/arch/arm/include/asm/hardware/sa1111.h @@ -13,8 +13,6 @@ #ifndef _ASM_ARCH_SA1111 #define _ASM_ARCH_SA1111 -#include - /* * Don't ask the (SAC) DMA engines to move less than this amount. */ diff --git a/arch/arm/mach-pxa/include/mach/bitfield.h b/arch/arm/mach-pxa/include/mach/bitfield.h deleted file mode 100644 index fe2ca441bc0a..000000000000 --- a/arch/arm/mach-pxa/include/mach/bitfield.h +++ /dev/null @@ -1,114 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * FILE bitfield.h - * - * Version 1.1 - * Author Copyright (c) Marc A. Viredaz, 1998 - * DEC Western Research Laboratory, Palo Alto, CA - * Date April 1998 (April 1997) - * System Advanced RISC Machine (ARM) - * Language C or ARM Assembly - * Purpose Definition of macros to operate on bit fields. - */ - - - -#ifndef __BITFIELD_H -#define __BITFIELD_H - -#ifndef __ASSEMBLY__ -#define UData(Data) ((unsigned long) (Data)) -#else -#define UData(Data) (Data) -#endif - - -/* - * MACRO: Fld - * - * Purpose - * The macro "Fld" encodes a bit field, given its size and its shift value - * with respect to bit 0. - * - * Note - * A more intuitive way to encode bit fields would have been to use their - * mask. However, extracting size and shift value information from a bit - * field's mask is cumbersome and might break the assembler (255-character - * line-size limit). - * - * Input - * Size Size of the bit field, in number of bits. - * Shft Shift value of the bit field with respect to bit 0. - * - * Output - * Fld Encoded bit field. - */ - -#define Fld(Size, Shft) (((Size) << 16) + (Shft)) - - -/* - * MACROS: FSize, FShft, FMsk, FAlnMsk, F1stBit - * - * Purpose - * The macros "FSize", "FShft", "FMsk", "FAlnMsk", and "F1stBit" return - * the size, shift value, mask, aligned mask, and first bit of a - * bit field. - * - * Input - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FSize Size of the bit field, in number of bits. - * FShft Shift value of the bit field with respect to bit 0. - * FMsk Mask for the bit field. - * FAlnMsk Mask for the bit field, aligned on bit 0. - * F1stBit First bit of the bit field. - */ - -#define FSize(Field) ((Field) >> 16) -#define FShft(Field) ((Field) & 0x0000FFFF) -#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field)) -#define FAlnMsk(Field) ((UData (1) << FSize (Field)) - 1) -#define F1stBit(Field) (UData (1) << FShft (Field)) - - -/* - * MACRO: FInsrt - * - * Purpose - * The macro "FInsrt" inserts a value into a bit field by shifting the - * former appropriately. - * - * Input - * Value Bit-field value. - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FInsrt Bit-field value positioned appropriately. - */ - -#define FInsrt(Value, Field) \ - (UData (Value) << FShft (Field)) - - -/* - * MACRO: FExtr - * - * Purpose - * The macro "FExtr" extracts the value of a bit field by masking and - * shifting it appropriately. - * - * Input - * Data Data containing the bit-field to be extracted. - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FExtr Bit-field value. - */ - -#define FExtr(Data, Field) \ - ((UData (Data) >> FShft (Field)) & FAlnMsk (Field)) - - -#endif /* __BITFIELD_H */