diff mbox series

[v2] arm64: cpufeature: Enable Qualcomm Falkor errata 1009 for Kryo

Message ID 20191029232738.1483923-1-bjorn.andersson@linaro.org
State New
Headers show
Series [v2] arm64: cpufeature: Enable Qualcomm Falkor errata 1009 for Kryo | expand

Commit Message

Bjorn Andersson Oct. 29, 2019, 11:27 p.m. UTC
The Kryo cores share errata 1009 with Falkor, so add their model
definitions and enable it for them as well.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

---

Changes since v1:
- Use is_kryo_midr(), rather than listing each individual model.

 arch/arm64/kernel/cpu_errata.c | 20 ++++++++++++++------
 1 file changed, 14 insertions(+), 6 deletions(-)

-- 
2.23.0

Comments

Will Deacon Oct. 31, 2019, 1:29 p.m. UTC | #1
[+Jeffrey]

On Tue, Oct 29, 2019 at 04:27:38PM -0700, Bjorn Andersson wrote:
> The Kryo cores share errata 1009 with Falkor, so add their model

> definitions and enable it for them as well.

> 

> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> ---

> 

> Changes since v1:

> - Use is_kryo_midr(), rather than listing each individual model.


Cheers, I've queued this up as a fix.

I also updated the E1009 entry in silicon-errata.rst but, in doing so, I
noticed that E1041 is listed there which apparently also affects
Kry^H^H^HHydra [1].

At which point, maybe we should rename both Kryo and Falkor in the tree
so that we consistently refer to Hydra as the underlying micro-architecture.
Obviously not something for 5.4, but it would sure help me to understand
what's doing on here.

Thoughts?

Will

[1] https://lore.kernel.org/kvmarm/20171115010505.GO11955@codeaurora.org/
Jeffrey Hugo Oct. 31, 2019, 2:17 p.m. UTC | #2
On 10/31/2019 6:29 AM, Will Deacon wrote:
> [+Jeffrey]

> 

> On Tue, Oct 29, 2019 at 04:27:38PM -0700, Bjorn Andersson wrote:

>> The Kryo cores share errata 1009 with Falkor, so add their model

>> definitions and enable it for them as well.

>>

>> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

>> ---

>>

>> Changes since v1:

>> - Use is_kryo_midr(), rather than listing each individual model.

> 

> Cheers, I've queued this up as a fix.

> 

> I also updated the E1009 entry in silicon-errata.rst but, in doing so, I

> noticed that E1041 is listed there which apparently also affects

> Kry^H^H^HHydra [1].

> 

> At which point, maybe we should rename both Kryo and Falkor in the tree

> so that we consistently refer to Hydra as the underlying micro-architecture.

> Obviously not something for 5.4, but it would sure help me to understand

> what's doing on here.

> 

> Thoughts?


Unfortunately, Falkor is also an underlying micro-architecture, it just 
happens to be strongly related to Hydra so a fair amount of the errata 
affect both.

I don't want to be difficult.  For ultimate "correctness", Falkor and 
Hydra should probably be separate, however the Falkor architecture is 
not widespread and unlikely to have much churn going forward.  So I 
think if it makes life easier for you, all the Falkor stuff can probably 
be scrubbed and just merged into Hydra.

> 

> Will

> 

> [1] https://lore.kernel.org/kvmarm/20171115010505.GO11955@codeaurora.org/

> 



-- 
Jeffrey Hugo
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
diff mbox series

Patch

diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
index 3facd5ca52ed..613075817abe 100644
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -623,17 +623,23 @@  static const struct midr_range arm64_harden_el2_vectors[] = {
 #endif
 
 #ifdef CONFIG_ARM64_WORKAROUND_REPEAT_TLBI
-
-static const struct midr_range arm64_repeat_tlbi_cpus[] = {
+static const struct arm64_cpu_capabilities arm64_repeat_tlbi_list[] = {
 #ifdef CONFIG_QCOM_FALKOR_ERRATUM_1009
-	MIDR_RANGE(MIDR_QCOM_FALKOR_V1, 0, 0, 0, 0),
+	{
+		ERRATA_MIDR_REV(MIDR_QCOM_FALKOR_V1, 0, 0)
+	},
+	{
+		.midr_range.model = MIDR_QCOM_KRYO,
+		.matches = is_kryo_midr,
+	},
 #endif
 #ifdef CONFIG_ARM64_ERRATUM_1286807
-	MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 0),
+	{
+		ERRATA_MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 0),
+	},
 #endif
 	{},
 };
-
 #endif
 
 #ifdef CONFIG_CAVIUM_ERRATUM_27456
@@ -789,7 +795,9 @@  const struct arm64_cpu_capabilities arm64_errata[] = {
 	{
 		.desc = "Qualcomm erratum 1009, ARM erratum 1286807",
 		.capability = ARM64_WORKAROUND_REPEAT_TLBI,
-		ERRATA_MIDR_RANGE_LIST(arm64_repeat_tlbi_cpus),
+		.type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,
+		.matches = cpucap_multi_entry_cap_matches,
+		.match_list = arm64_repeat_tlbi_list,
 	},
 #endif
 #ifdef CONFIG_ARM64_ERRATUM_858921