| Message ID | 20191223143046.3376299-5-vkoul@kernel.org |
|---|---|
| State | Accepted |
| Commit | d0312fdbf3e1dc34bc370b17fee290921cf9b814 |
| Headers | show |
| Series | phy: qcom-qmp: Fixes and updates for sm8150 | expand |
On 12/23/2019 8:00 PM, Vinod Koul wrote: > For V4 QMP UFS Phy, we need to assert reset bits, configure the phy and > then deassert it, so add the QPHY_SW_RESET register which does this. > > Signed-off-by: Vinod Koul <vkoul@kernel.org> > --- > drivers/phy/qualcomm/phy-qcom-qmp.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c > index ce5e18f188c3..7db2a94f7a99 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qmp.c > +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c > @@ -168,6 +168,7 @@ static const unsigned int sdm845_ufsphy_regs_layout[] = { > static const unsigned int sm8150_ufsphy_regs_layout[] = { > [QPHY_START_CTRL] = QPHY_V4_PHY_START, > [QPHY_PCS_READY_STATUS] = QPHY_V4_PCS_READY_STATUS, > + [QPHY_SW_RESET] = QPHY_V4_SW_RESET, > }; > > static const struct qmp_phy_init_tbl msm8996_pcie_serdes_tbl[] = { Reviewed-by: Manu Gautam <mgautam@codeaurora.org> -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
On 2019-12-23 22:30, Vinod Koul wrote: > For V4 QMP UFS Phy, we need to assert reset bits, configure the phy and > then deassert it, so add the QPHY_SW_RESET register which does this. > > Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Can Guo <cang@codeaurora.org> > --- > drivers/phy/qualcomm/phy-qcom-qmp.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c > b/drivers/phy/qualcomm/phy-qcom-qmp.c > index ce5e18f188c3..7db2a94f7a99 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qmp.c > +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c > @@ -168,6 +168,7 @@ static const unsigned int > sdm845_ufsphy_regs_layout[] = { > static const unsigned int sm8150_ufsphy_regs_layout[] = { > [QPHY_START_CTRL] = QPHY_V4_PHY_START, > [QPHY_PCS_READY_STATUS] = QPHY_V4_PCS_READY_STATUS, > + [QPHY_SW_RESET] = QPHY_V4_SW_RESET, > }; > > static const struct qmp_phy_init_tbl msm8996_pcie_serdes_tbl[] = {
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index ce5e18f188c3..7db2a94f7a99 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -168,6 +168,7 @@ static const unsigned int sdm845_ufsphy_regs_layout[] = { static const unsigned int sm8150_ufsphy_regs_layout[] = { [QPHY_START_CTRL] = QPHY_V4_PHY_START, [QPHY_PCS_READY_STATUS] = QPHY_V4_PCS_READY_STATUS, + [QPHY_SW_RESET] = QPHY_V4_SW_RESET, }; static const struct qmp_phy_init_tbl msm8996_pcie_serdes_tbl[] = {
For V4 QMP UFS Phy, we need to assert reset bits, configure the phy and then deassert it, so add the QPHY_SW_RESET register which does this. Signed-off-by: Vinod Koul <vkoul@kernel.org> --- drivers/phy/qualcomm/phy-qcom-qmp.c | 1 + 1 file changed, 1 insertion(+) -- 2.23.0