diff mbox series

Revert "drm/etnaviv: reject timeouts with tv_nsec >= NSEC_PER_SEC"

Message ID 20200128130710.4154835-1-arnd@arndb.de
State Accepted
Commit c4e71212a245017d2ab05f322f7722f0b87a55da
Headers show
Series Revert "drm/etnaviv: reject timeouts with tv_nsec >= NSEC_PER_SEC" | expand

Commit Message

Arnd Bergmann Jan. 28, 2020, 1:06 p.m. UTC 
This reverts commit 172a216ff334ad869b0d74188a70763e4167fd9e.

Guido Günther reported issues with this patch that broke existing
user space. Let's revert it for now and fix it properly later on.

Link: https://patchwork.kernel.org/patch/11291089/
https://lore.kernel.org/lkml/20200121114553.2667556-1-arnd@arndb.de/
Cc: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
I've added this to my branch for inclusion in v5.6 to avoid the
regression.

 drivers/gpu/drm/etnaviv/etnaviv_drv.c | 9 ---------
 1 file changed, 9 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
index 3eb0f9223bea..ac26c084f30d 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
@@ -292,9 +292,6 @@  static int etnaviv_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
 	if (args->op & ~(ETNA_PREP_READ | ETNA_PREP_WRITE | ETNA_PREP_NOSYNC))
 		return -EINVAL;
 
-	if (args->timeout.tv_nsec > NSEC_PER_SEC)
-		return -EINVAL;
-
 	obj = drm_gem_object_lookup(file, args->handle);
 	if (!obj)
 		return -ENOENT;
@@ -358,9 +355,6 @@  static int etnaviv_ioctl_wait_fence(struct drm_device *dev, void *data,
 	if (args->flags & ~(ETNA_WAIT_NONBLOCK))
 		return -EINVAL;
 
-	if (args->timeout.tv_nsec > NSEC_PER_SEC)
-		return -EINVAL;
-
 	if (args->pipe >= ETNA_MAX_PIPES)
 		return -EINVAL;
 
@@ -412,9 +406,6 @@  static int etnaviv_ioctl_gem_wait(struct drm_device *dev, void *data,
 	if (args->flags & ~(ETNA_WAIT_NONBLOCK))
 		return -EINVAL;
 
-	if (args->timeout.tv_nsec > NSEC_PER_SEC)
-		return -EINVAL;
-
 	if (args->pipe >= ETNA_MAX_PIPES)
 		return -EINVAL;