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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id p2sm11057428pgh.25.2020.05.12.17.55.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 17:55:30 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Ohad Ben-Cohen , Baolin Wang , Rob Herring Cc: linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/4] dt-bindings: hwlock: qcom: Migrate binding to YAML Date: Tue, 12 May 2020 17:54:38 -0700 Message-Id: <20200513005441.1102586-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200513005441.1102586-1-bjorn.andersson@linaro.org> References: <20200513005441.1102586-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Migrate the Qualcomm TCSR mutex binding to YAML to allow validation. Signed-off-by: Bjorn Andersson Reviewed-by: Vinod Koul --- .../bindings/hwlock/qcom-hwspinlock.yaml | 51 +++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml diff --git a/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml new file mode 100644 index 000000000000..71e63b52edd5 --- /dev/null +++ b/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwlock/qcom-hwspinlock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Hardware Mutex Block + +maintainers: + - Bjorn Andersson + +description: + The hardware block provides mutexes utilized between different processors on + the SoC as part of the communication protocol used by these processors. + +properties: + compatible: + enum: + - qcom,sfpb-mutex + - qcom,tcsr-mutex + + '#hwlock-cells': + const: 1 + + syscon: + $ref: "/schemas/types.yaml#/definitions/phandle-array" + description: + Should be a triple of phandle referencing the TCSR mutex syscon, offset + of first mutex within the syscon and stride between each mutex. + +required: + - compatible + - '#hwlock-cells' + - syscon + +additionalProperties: false + +examples: + - | + tcsr_mutex_block: syscon@fd484000 { + compatible = "syscon"; + reg = <0xfd484000 0x2000>; + }; + + hwlock { + compatible = "qcom,tcsr-mutex"; + syscon = <&tcsr_mutex_block 0 0x80>; + + #hwlock-cells = <1>; + }; +...