| Message ID | 1581434955-11087-1-git-send-email-vbadigan@codeaurora.org |
|---|---|
| State | New |
| Headers | show |
| Series | [V1] dt-bindings: mmc: sdhci-msm: Add CQE reg map | expand |
On Mon, 24 Feb 2020 at 12:58, Veerabhadrarao Badiganti <vbadigan@codeaurora.org> wrote: > > CQE feature has been enabled on sdhci-msm. Add CQE reg map > and reg names that need to be supplied for supporting CQE feature. > > Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> Applied for next, thanks! Kind regards Uffe > --- > Changes since V2: > - Dropped _mem suffix to reg names. > > Changes since V1: > - Updated description for more clarity & Fixed typos. > --- > Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt > index 7ee639b..5445931 100644 > --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt > +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt > @@ -26,7 +26,13 @@ Required properties: > > - reg: Base address and length of the register in the following order: > - Host controller register map (required) > - - SD Core register map (required for msm-v4 and below) > + - SD Core register map (required for controllers earlier than msm-v5) > + - CQE register map (Optional, CQE support is present on SDHC instance meant > + for eMMC and version v4.2 and above) > +- reg-names: When CQE register map is supplied, below reg-names are required > + - "hc" for Host controller register map > + - "core" for SD core register map > + - "cqhci" for CQE register map > - interrupts: Should contain an interrupt-specifiers for the interrupts: > - Host controller interrupt (required) > - pinctrl-names: Should contain only one value - "default". > -- > Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt index 7ee639b..eaa0998 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt @@ -27,6 +27,11 @@ Required properties: - reg: Base address and length of the register in the following order: - Host controller register map (required) - SD Core register map (required for msm-v4 and below) + - CQE register map (Optional, needed only for eMMC and msm-v4.2 above) +- reg-names: When CQE register map is supplied, below reg-names are required + - "hc_mem" for Host controller register map + - "core_mem" for SD cpre regoster map + - "cqhci_mem" for CQE register map - interrupts: Should contain an interrupt-specifiers for the interrupts: - Host controller interrupt (required) - pinctrl-names: Should contain only one value - "default".
CQE feature has been enabled on sdhci-msm. Add CQE reg map that needs to be supplied for supporting CQE feature. Change-Id: I788c4bd5b7cbca16bc1030a410cc5550ed7204e1 Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> --- Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 5 +++++ 1 file changed, 5 insertions(+)