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[2/2] ARM: Add IT instructions to inline assembler

Message ID 1377599760-5751-3-git-send-email-steve.capper@linaro.org
State New
Headers show

Commit Message

Steve Capper Aug. 27, 2013, 10:36 a.m. UTC 
From: Leif Lindholm <leif.lindholm@linaro.org>

External code that uses libTBB will pull in gcc_armv7.h, which
has inline assembler that contains conditional instructions.

Unfortunately these external programs won't necessarily have the
`-Wa,-mimplicit-it=thumb' build option when compiling for Thumb
state, thus may fail to build for Thumb under older build systems.

To remedy this, we add the IT instructions to gcc_armv7.h that
would normally be added implicitly by the assembler.

Signed-off-by: Steve Capper <steve.capper@linaro.org>
---
 include/tbb/machine/gcc_armv7.h | 3 +++
 1 file changed, 3 insertions(+)
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Patch

diff --git a/include/tbb/machine/gcc_armv7.h b/include/tbb/machine/gcc_armv7.h
index fde1f7a..05ef6a9 100644
--- a/include/tbb/machine/gcc_armv7.h
+++ b/include/tbb/machine/gcc_armv7.h
@@ -88,6 +88,7 @@  static inline int32_t __TBB_machine_cmpswp4(volatile void *ptr, int32_t value, i
         "ldrex      %1, [%3]\n"
         "mov        %0, #0\n"
         "cmp        %1, %4\n"
+	"it         eq\n"
         "strexeq    %0, %5, [%3]\n"
         : "=&r" (res), "=&r" (oldval), "+Qo" (*(volatile int32_t*)ptr)
         : "r" ((int32_t *)ptr), "Ir" (comparand), "r" (value)
@@ -118,7 +119,9 @@  static inline int64_t __TBB_machine_cmpswp8(volatile void *ptr, int64_t value, i
             "mov        %0, #0\n"
             "ldrexd     %1, %H1, [%3]\n"
             "cmp        %1, %4\n"
+            "it         eq\n"
             "cmpeq      %H1, %H4\n"
+            "it         eq\n"
             "strexdeq   %0, %5, %H5, [%3]"
         : "=&r" (res), "=&r" (oldval), "+Qo" (*(volatile int64_t*)ptr)
         : "r" ((int64_t *)ptr), "r" (comparand), "r" (value)