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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id p2sm11057428pgh.25.2020.05.12.17.55.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 17:55:31 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Ohad Ben-Cohen , Baolin Wang , Rob Herring Cc: linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/4] dt-bindings: hwlock: qcom: Allow device on mmio bus Date: Tue, 12 May 2020 17:54:39 -0700 Message-Id: <20200513005441.1102586-3-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200513005441.1102586-1-bjorn.andersson@linaro.org> References: <20200513005441.1102586-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In all modern Qualcomm platforms the mutex region of the TCSR is forked off into its own block, all with a offset of 0 and stride of 4096. Update the binding to allow the hardware block to be described directly on the mmio bus, in addition to allowing the existing syscon based definition. Signed-off-by: Bjorn Andersson --- .../bindings/hwlock/qcom-hwspinlock.yaml | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml index 71e63b52edd5..88f975837588 100644 --- a/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml +++ b/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml @@ -19,6 +19,9 @@ properties: - qcom,sfpb-mutex - qcom,tcsr-mutex + reg: + maxItems: 1 + '#hwlock-cells': const: 1 @@ -31,7 +34,12 @@ properties: required: - compatible - '#hwlock-cells' - - syscon + +oneOf: + - required: + - reg + - required: + - syscon additionalProperties: false @@ -46,6 +54,12 @@ examples: compatible = "qcom,tcsr-mutex"; syscon = <&tcsr_mutex_block 0 0x80>; + #hwlock-cells = <1>; + }; + - | + tcsr_mutex: hwlock@1f40000 { + compatible = "qcom,tcsr-mutex"; + reg = <0x01f40000 0x40000>; #hwlock-cells = <1>; }; ...