| Message ID | 20200318062102.8145-7-jiaxun.yang@flygoat.com |
|---|---|
| State | New |
| Headers | show |
| Series | Modernize Loongson64 Machine v5 | expand |
diff --git a/drivers/irqchip/irq-mips-cpu.c b/drivers/irqchip/irq-mips-cpu.c index 95d4fd8f7a96..c3cf7fa76424 100644 --- a/drivers/irqchip/irq-mips-cpu.c +++ b/drivers/irqchip/irq-mips-cpu.c @@ -251,7 +251,7 @@ static void __init __mips_cpu_irq_init(struct device_node *of_node) clear_c0_status(ST0_IM); clear_c0_cause(CAUSEF_IP); - irq_domain = irq_domain_add_legacy(of_node, 8, MIPS_CPU_IRQ_BASE, 0, + irq_domain = irq_domain_add_simple(of_node, 8, MIPS_CPU_IRQ_BASE, &mips_cpu_intc_irq_domain_ops, NULL); if (!irq_domain)
The old code is using legacy domain to setup irq_domain for CPU interrupts which requires irq_desc to be preallocated. However, when MIPS_CPU_IRQ_BASE >= 16, irq_desc for CPU IRQs may end up unallocated and lead to incorrect behavior. Thus we convert the legacy domain to simple domain which can allocate irq_desc during initialization. Co-developed-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> --- drivers/irqchip/irq-mips-cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)