| Message ID | 20200108092908.1.I3afd3535b65460e79f3976e9ebfa392a0dd75e01@changeid |
|---|---|
| State | New |
| Headers | show |
| Series | ARM: dts: rockchip: Use ABI name for recovery mode pin on veyron fievel/tiger | expand |
diff --git a/arch/arm/boot/dts/rk3288-veyron-fievel.dts b/arch/arm/boot/dts/rk3288-veyron-fievel.dts index 2d6f32b77821b8..9f4bb5d2e7d8dd 100644 --- a/arch/arm/boot/dts/rk3288-veyron-fievel.dts +++ b/arch/arm/boot/dts/rk3288-veyron-fievel.dts @@ -234,7 +234,11 @@ "PHY_PMEB", "PHY_INT", - "REC_MODE_L", + /* + * RECOVERY_SW_L is Chrome OS ABI. Schematics call + * it REC_MODE_L. + */ + "RECOVERY_SW_L", "OTP_OUT", "", "USB_OTG_POWER_EN",
The recovery mode pin is currently named 'REC_MODE_L', which is how the signal is called in the schematics. The Chrome OS ABI requires the pin to be named 'RECOVERY_SW_L', which is also how it is called on all other veyron devices. Rename the pin to match the ABI. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> --- Another misnamed pin, I should have noticed when fixing the name of the write protect pin ... arch/arm/boot/dts/rk3288-veyron-fievel.dts | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)