From patchwork Fri Sep 27 12:10:55 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajeshwari Shinde X-Patchwork-Id: 20666 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-vb0-f69.google.com (mail-vb0-f69.google.com [209.85.212.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id A218924687 for ; Fri, 27 Sep 2013 12:10:14 +0000 (UTC) Received: by mail-vb0-f69.google.com with SMTP id e13sf2231459vbg.8 for ; Fri, 27 Sep 2013 05:10:14 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:dlp-filter:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=TxTlX4SNSw6Cm3mGdyyQrxWRcX13Hnhjh28p6vOVEgs=; b=Hns88ushL7kyylxhodBC7bsEnXzAtRtDxrH45Lza0PZqhJBCgTUaiochAFXBA7TcEI hq7v6FJcvFLMWM4s9PuDJrubHnsmGyqKpGvaICYbj5pJtMrP+UrEKnqUDQIjBaA/hbFp nSVRfVLMWT+Ub1wZfC87m5xV6o44w7neWQweN44igRmCCn6dP6tK5Sagk6dseKrTgJJq F8qpHxyRMWOgCvWcN4SlxyJjcthWJONiIOeKSgJjVvhCwr+TnJ+THPBa9JgWrIcFHARh Gd4/qG0TMOv8cwMl1EYB+r21CE2ak6wy7RM2rNr/Pi+iXcZ/3zzmDjW4czPh4O3gTOLm 7SVw== X-Gm-Message-State: ALoCoQm4UnSpJC9geZ3tYzAivbaqG/QchMrwLbA4UWxVr/J9qbMdu8BD6ljZhkJVoUAtuiRc/6i8 X-Received: by 10.58.220.136 with SMTP id pw8mr464867vec.13.1380283814455; Fri, 27 Sep 2013 05:10:14 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.2.166 with SMTP id 6ls1215782qev.69.gmail; Fri, 27 Sep 2013 05:10:14 -0700 (PDT) X-Received: by 10.220.196.66 with SMTP id ef2mr232171vcb.7.1380283814363; Fri, 27 Sep 2013 05:10:14 -0700 (PDT) Received: from mail-vc0-f175.google.com (mail-vc0-f175.google.com [209.85.220.175]) by mx.google.com with ESMTPS id h13si1742490vco.86.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 27 Sep 2013 05:10:14 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.220.175 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.175; Received: by mail-vc0-f175.google.com with SMTP id ia10so1774771vcb.34 for ; Fri, 27 Sep 2013 05:09:44 -0700 (PDT) X-Received: by 10.58.168.205 with SMTP id zy13mr6029211veb.19.1380283784252; Fri, 27 Sep 2013 05:09:44 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp424336vcz; Fri, 27 Sep 2013 05:09:43 -0700 (PDT) X-Received: by 10.68.113.130 with SMTP id iy2mr7119264pbb.2.1380283780021; Fri, 27 Sep 2013 05:09:40 -0700 (PDT) Received: from mailout3.samsung.com (mailout3.samsung.com. [203.254.224.33]) by mx.google.com with ESMTP id mo9si6222035pbc.216.1969.12.31.16.00.00; Fri, 27 Sep 2013 05:09:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.33 as permitted sender) client-ip=203.254.224.33; Received: from epcpsbgr2.samsung.com (u142.gpu120.samsung.co.kr [203.254.230.142]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MTS00MF99RD2I90@mailout3.samsung.com>; Fri, 27 Sep 2013 21:09:35 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.123]) by epcpsbgr2.samsung.com (EPCPMTA) with SMTP id C7.89.17682.F7575425; Fri, 27 Sep 2013 21:09:35 +0900 (KST) X-AuditID: cbfee68e-b7f756d000004512-44-5245757f88d3 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id AD.29.05832.F7575425; Fri, 27 Sep 2013 21:09:35 +0900 (KST) Received: from localhost.localdomain.com ([107.108.73.95]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MTS00FOV9REFX60@mmp2.samsung.com>; Fri, 27 Sep 2013 21:09:35 +0900 (KST) From: Rajeshwari S Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, sjg@chromium.org, mk7.kang@samsung.com, chander.kashyap@linaro.org, u-boot-review@google.com, panto@antoniou-consulting.com, alim.akhtar@samsung.com Subject: [PATCH 10/10 V4] DWMMC: SMDK5420: Disable SMU for eMMC Date: Fri, 27 Sep 2013 17:40:55 +0530 Message-id: <1380283855-8070-11-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.11.7 In-reply-to: <1380283855-8070-1-git-send-email-rajeshwari.s@samsung.com> References: <1380283855-8070-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrPLMWRmVeSWpSXmKPExsWyRsSkWre+1DXIYNF+A4sH87axWTxcf5PF ouNIC6PFrtuTWSymHP7CYvFtyzZGi+WvN7JbvN3bye7A4THv50Qmj9kNF1k8Fmwq9bhzbQ+b x9k7Oxg9+rasYgxgi+KySUnNySxLLdK3S+DKePb+MEvBDNGKbaevsDQw7hLsYuTgkBAwkZh9 pbCLkRPIFJO4cG89WxcjF4eQwFJGiUcXd7JBJEwkds48ywSRmM4osfzAfhYIp4tJ4tbv7Wwg k9iAqjaeSABpEBGQkPjVf5URxGYW2MAoMecXN4gtLGAv8fX9e3YQm0VAVeLw+VtgNq+Ah8SR ldsYIZYpSsxY8gzM5gSKz/x/gQnEFhJwl+j/d5ARZK+EwCp2ifV35rBBDBKQ+Db5EAvEN7IS mw4wQ8yRlDi44gbLBEbhBYwMqxhFUwuSC4qT0ouM9IoTc4tL89L1kvNzNzECA//0v2d9Oxhv HrA+xJgMNG4is5Rocj4wcvJK4g2NzYwsTE1MjY3MLc1IE1YS51VrsQ4UEkhPLEnNTk0tSC2K LyrNSS0+xMjEwSnVwKhu5fNF6Azrq6xGp3KxpelRaY5vZMoKHIWcVBevCZKZ+0FtxcaHDcee OOluzv8S5y1141e2gV5yyYoH/LvMipaxNebcfJoQtOKWtLTGmi+MlnI52zxc9tsx8Qudljui Y/L1p/NuBgv1/9Z83z6Knv24+6mgjeyX+nk5Xx5vnimzknnP7wU6rEosxRmJhlrMRcWJANJO GO2SAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrLIsWRmVeSWpSXmKPExsVy+t9jQd36UtcggzlzNS0ezNvGZvFw/U0W i44jLYwWu25PZrGYcvgLi8W3LdsYLZa/3shu8XZvJ7sDh8e8nxOZPGY3XGTxWLCp1OPOtT1s Hmfv7GD06NuyijGALaqB0SYjNTEltUghNS85PyUzL91WyTs43jne1MzAUNfQ0sJcSSEvMTfV VsnFJ0DXLTMH6CIlhbLEnFKgUEBicbGSvh2mCaEhbroWMI0Rur4hQXA9RgZoIGENY8az94dZ CmaIVmw7fYWlgXGXYBcjJ4eEgInEzplnmSBsMYkL99azdTFycQgJTGeUWH5gPwuE08Ukcev3 dqAMBwcbUMfGEwkgDSICEhK/+q8ygtjMAhsYJeb84gaxhQXsJb6+f88OYrMIqEocPn8LzOYV 8JA4snIbI8QyRYkZS56B2ZxA8Zn/L4AdISTgLtH/7yDjBEbeBYwMqxhFUwuSC4qT0nON9IoT c4tL89L1kvNzNzGCI+uZ9A7GVQ0WhxgFOBiVeHgzslyChFgTy4orcw8xSnAwK4nwLvB0DRLi TUmsrEotyo8vKs1JLT7EmAx01URmKdHkfGDU55XEGxqbmJsam1qaWJiYWZImrCTOe7DVOlBI ID2xJDU7NbUgtQhmCxMHp1QDo6eNmN4G/fipKz3/bfI4GVoiXPxdozlok4RZyJdys5bfm85o zOwte7U5h81Z/HFjTyJvM8eJrL+H7k2JYkp/EVTw94N8ejVjW0RoRHzb6l6PLTNjVmj2O3Dr 751399HOv52Pd74sXrxw2QRpm7b+anXL+sMGuk/UdPpnGL7onrpPTFudSzVPiaU4I9FQi7mo OBEAfMHGDfACAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rajeshwari.s@samsung.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.175 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , SMDK5420 has a new Security Management Unit added for dwmmc driver, hence, configuring the control registers to support booting via eMMC. Signed-off-by: Alim Akhtar Signed-off-by: Rajeshwari Shinde Acked-by: Simon Glass --- Changes in V3: - New patch. Changes in V4: Added flag to dissble SMU drivers/mmc/dw_mmc.c | 10 ++++++++++ drivers/mmc/exynos_dw_mmc.c | 3 +++ include/dwmmc.h | 15 +++++++++++++++ 3 files changed, 28 insertions(+) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index a82ee17..2a8da5c 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -300,6 +300,16 @@ static int dwmci_init(struct mmc *mmc) struct dwmci_host *host = (struct dwmci_host *)mmc->priv; u32 fifo_size; + if (host->quirks & DWMCI_QUIRK_DISABLE_SMU) { + dwmci_writel(host, EMMCP_MPSBEGIN0, 0); + dwmci_writel(host, EMMCP_SEND0, 0); + dwmci_writel(host, EMMCP_CTRL0, + MPSCTRL_SECURE_READ_BIT | + MPSCTRL_SECURE_WRITE_BIT | + MPSCTRL_NON_SECURE_READ_BIT | + MPSCTRL_NON_SECURE_WRITE_BIT | MPSCTRL_VALID); + } + dwmci_writel(host, DWMCI_PWREN, 1); if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) { diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 4ef9fec..f7439a0 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -62,6 +62,9 @@ int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel) host->name = "EXYNOS DWMMC"; host->ioaddr = (void *)regbase; host->buswidth = bus_width; +#ifdef CONFIG_EXYNOS5420 + host->quirks = DWMCI_QUIRK_DISABLE_SMU; +#endif if (clksel) { host->clksel_val = clksel; diff --git a/include/dwmmc.h b/include/dwmmc.h index 08ced0b..00bceec 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -49,6 +49,9 @@ #define DWMCI_DSCADDR 0x094 #define DWMCI_BUFADDR 0x098 #define DWMCI_DATA 0x200 +#define EMMCP_MPSBEGIN0 0x1200 +#define EMMCP_SEND0 0x1204 +#define EMMCP_CTRL0 0x120C /* Interrupt Mask register */ #define DWMCI_INTMSK_ALL 0xffffffff @@ -123,6 +126,18 @@ #define DWMCI_BMOD_IDMAC_FB (1 << 1) #define DWMCI_BMOD_IDMAC_EN (1 << 7) +#define MPSCTRL_SECURE_READ_BIT (0x1<<7) +#define MPSCTRL_SECURE_WRITE_BIT (0x1<<6) +#define MPSCTRL_NON_SECURE_READ_BIT (0x1<<5) +#define MPSCTRL_NON_SECURE_WRITE_BIT (0x1<<4) +#define MPSCTRL_USE_FUSE_KEY (0x1<<3) +#define MPSCTRL_ECB_MODE (0x1<<2) +#define MPSCTRL_ENCRYPTION (0x1<<1) +#define MPSCTRL_VALID (0x1<<0) + +/* quirks */ +#define DWMCI_QUIRK_DISABLE_SMU (1 << 0) + struct dwmci_host { char *name; void *ioaddr;