@@ -192,11 +192,11 @@ static int dio48e_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
/* clear bits array to a clean slate */
bitmap_zero(bits, chip->ngpio);
- for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
+ for_each_set_clump(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8, 8) {
port_addr = dio48egpio->base + ports[offset / 8];
port_state = inb(port_addr) & gpio_mask;
- bitmap_set_value8(bits, port_state, offset);
+ bitmap_set_value(bits, port_state, offset, 8);
}
return 0;
@@ -233,11 +233,11 @@ static void dio48e_gpio_set_multiple(struct gpio_chip *chip,
unsigned long bitmask;
unsigned long flags;
- for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
+ for_each_set_clump(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8, 8) {
index = offset / 8;
port_addr = dio48egpio->base + ports[index];
- bitmask = bitmap_get_value8(bits, offset) & gpio_mask;
+ bitmask = bitmap_get_value(bits, offset, 8) & gpio_mask;
raw_spin_lock_irqsave(&dio48egpio->lock, flags);
@@ -94,11 +94,11 @@ static int idi_48_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
/* clear bits array to a clean slate */
bitmap_zero(bits, chip->ngpio);
- for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
+ for_each_set_clump(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8, 8) {
port_addr = idi48gpio->base + ports[offset / 8];
port_state = inb(port_addr) & gpio_mask;
- bitmap_set_value8(bits, port_state, offset);
+ bitmap_set_value(bits, port_state, offset, 8);
}
return 0;
@@ -79,9 +79,9 @@ static void gen_74x164_set_multiple(struct gpio_chip *gc, unsigned long *mask,
unsigned long bitmask;
mutex_lock(&chip->lock);
- for_each_set_clump8(offset, bankmask, mask, chip->registers * 8) {
+ for_each_set_clump(offset, bankmask, mask, chip->registers * 8, 8) {
bank = chip->registers - 1 - offset / 8;
- bitmask = bitmap_get_value8(bits, offset) & bankmask;
+ bitmask = bitmap_get_value(bits, offset, 8) & bankmask;
chip->buffer[bank] &= ~bankmask;
chip->buffer[bank] |= bitmask;
@@ -181,11 +181,11 @@ static int gpiomm_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
/* clear bits array to a clean slate */
bitmap_zero(bits, chip->ngpio);
- for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
+ for_each_set_clump(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8, 8) {
port_addr = gpiommgpio->base + ports[offset / 8];
port_state = inb(port_addr) & gpio_mask;
- bitmap_set_value8(bits, port_state, offset);
+ bitmap_set_value(bits, port_state, offset, 8);
}
return 0;
@@ -223,11 +223,11 @@ static void gpiomm_gpio_set_multiple(struct gpio_chip *chip,
unsigned long bitmask;
unsigned long flags;
- for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
+ for_each_set_clump(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8, 8) {
index = offset / 8;
port_addr = gpiommgpio->base + ports[index];
- bitmask = bitmap_get_value8(bits, offset) & gpio_mask;
+ bitmask = bitmap_get_value(bits, offset, 8) & gpio_mask;
spin_lock_irqsave(&gpiommgpio->lock, flags);
@@ -245,7 +245,7 @@ static int max3191x_get_multiple(struct gpio_chip *gpio, unsigned long *mask,
goto out_unlock;
bitmap_zero(bits, gpio->ngpio);
- for_each_set_clump8(bit, gpio_mask, mask, gpio->ngpio) {
+ for_each_set_clump(bit, gpio_mask, mask, gpio->ngpio, 8) {
unsigned int chipnum = bit / MAX3191X_NGPIO;
if (max3191x_chip_is_faulting(max3191x, chipnum)) {
@@ -255,7 +255,7 @@ static int max3191x_get_multiple(struct gpio_chip *gpio, unsigned long *mask,
in = ((u8 *)max3191x->xfer.rx_buf)[chipnum * wordlen];
in &= gpio_mask;
- bitmap_set_value8(bits, in, bit);
+ bitmap_set_value(bits, in, bit, 8);
}
out_unlock:
@@ -343,7 +343,7 @@ static int pca953x_write_regs(struct pca953x_chip *chip, int reg, unsigned long
int i, ret;
for (i = 0; i < NBANK(chip); i++)
- value[i] = bitmap_get_value8(val, i * BANK_SZ);
+ value[i] = bitmap_get_value(val, i * BANK_SZ, 8);
ret = regmap_bulk_write(chip->regmap, regaddr, value, NBANK(chip));
if (ret < 0) {
@@ -367,7 +367,7 @@ static int pca953x_read_regs(struct pca953x_chip *chip, int reg, unsigned long *
}
for (i = 0; i < NBANK(chip); i++)
- bitmap_set_value8(val, value[i], i * BANK_SZ);
+ bitmap_set_value(val, value[i], i * BANK_SZ, 8);
return 0;
}
@@ -112,11 +112,11 @@ static int idio_16_gpio_get_multiple(struct gpio_chip *chip,
/* clear bits array to a clean slate */
bitmap_zero(bits, chip->ngpio);
- for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
+ for_each_set_clump(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8, 8) {
port_addr = ports[offset / 8];
port_state = ioread8(port_addr) & gpio_mask;
- bitmap_set_value8(bits, port_state, offset);
+ bitmap_set_value(bits, port_state, offset, 8);
}
return 0;
@@ -167,11 +167,11 @@ static void idio_16_gpio_set_multiple(struct gpio_chip *chip,
unsigned long flags;
unsigned long out_state;
- for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
+ for_each_set_clump(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8, 8) {
index = offset / 8;
port_addr = ports[index];
- bitmask = bitmap_get_value8(bits, offset) & gpio_mask;
+ bitmask = bitmap_get_value(bits, offset, 8) & gpio_mask;
raw_spin_lock_irqsave(&idio16gpio->lock, flags);
@@ -215,7 +215,7 @@ static int idio_24_gpio_get_multiple(struct gpio_chip *chip,
/* clear bits array to a clean slate */
bitmap_zero(bits, chip->ngpio);
- for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
+ for_each_set_clump(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8, 8) {
index = offset / 8;
/* read bits from current gpio port (port 6 is TTL GPIO) */
@@ -228,7 +228,7 @@ static int idio_24_gpio_get_multiple(struct gpio_chip *chip,
port_state &= gpio_mask;
- bitmap_set_value8(bits, port_state, offset);
+ bitmap_set_value(bits, port_state, offset, 8);
}
return 0;
@@ -291,10 +291,10 @@ static void idio_24_gpio_set_multiple(struct gpio_chip *chip,
unsigned long out_state;
const unsigned long out_mode_mask = BIT(1);
- for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
+ for_each_set_clump(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8, 8) {
index = offset / 8;
- bitmask = bitmap_get_value8(bits, offset) & gpio_mask;
+ bitmask = bitmap_get_value(bits, offset, 8) & gpio_mask;
raw_spin_lock_irqsave(&idio24gpio->lock, flags);
@@ -103,9 +103,9 @@ static int pisosr_gpio_get_multiple(struct gpio_chip *chip,
pisosr_gpio_refresh(gpio);
bitmap_zero(bits, chip->ngpio);
- for_each_set_clump8(offset, gpio_mask, mask, chip->ngpio) {
+ for_each_set_clump(offset, gpio_mask, mask, chip->ngpio, 8) {
buffer_state = gpio->buffer[offset / 8] & gpio_mask;
- bitmap_set_value8(bits, buffer_state, offset);
+ bitmap_set_value(bits, buffer_state, offset, 8);
}
return 0;
@@ -149,9 +149,9 @@ static void uniphier_gpio_set_multiple(struct gpio_chip *chip,
{
unsigned long i, bank, bank_mask, bank_bits;
- for_each_set_clump8(i, bank_mask, mask, chip->ngpio) {
+ for_each_set_clump(i, bank_mask, mask, chip->ngpio, UNIPHIER_GPIO_LINES_PER_BANK) {
bank = i / UNIPHIER_GPIO_LINES_PER_BANK;
- bank_bits = bitmap_get_value8(bits, i);
+ bank_bits = bitmap_get_value(bits, i, UNIPHIER_GPIO_LINES_PER_BANK);
uniphier_gpio_bank_write(chip, bank, UNIPHIER_GPIO_PORT_DATA,
bank_mask, bank_bits);
@@ -137,11 +137,11 @@ static int ws16c48_gpio_get_multiple(struct gpio_chip *chip,
/* clear bits array to a clean slate */
bitmap_zero(bits, chip->ngpio);
- for_each_set_clump8(offset, gpio_mask, mask, chip->ngpio) {
+ for_each_set_clump(offset, gpio_mask, mask, chip->ngpio, 8) {
port_addr = ws16c48gpio->base + offset / 8;
port_state = inb(port_addr) & gpio_mask;
- bitmap_set_value8(bits, port_state, offset);
+ bitmap_set_value(bits, port_state, offset, 8);
}
return 0;
@@ -182,13 +182,13 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip,
unsigned long bitmask;
unsigned long flags;
- for_each_set_clump8(offset, gpio_mask, mask, chip->ngpio) {
+ for_each_set_clump(offset, gpio_mask, mask, chip->ngpio, 8) {
index = offset / 8;
port_addr = ws16c48gpio->base + index;
/* mask out GPIO configured for input */
gpio_mask &= ~ws16c48gpio->io_state[index];
- bitmask = bitmap_get_value8(bits, offset) & gpio_mask;
+ bitmask = bitmap_get_value(bits, offset, 8) & gpio_mask;
raw_spin_lock_irqsave(&ws16c48gpio->lock, flags);
@@ -123,7 +123,7 @@ static int update_trip_temp(struct intel_soc_dts_sensor_entry *dts,
return status;
update_ptps = store_ptps;
- bitmap_set_value8(&update_ptps, temp_out & 0xFF, thres_index * 8);
+ bitmap_set_value(&update_ptps, temp_out & 0xFF, thres_index * 8, 8);
out = update_ptps;
status = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE,
@@ -237,7 +237,7 @@ static int sys_get_curr_temp(struct thermal_zone_device *tzd,
return status;
raw = out;
- out = bitmap_get_value8(&raw, dts->id * 8) - SOC_DTS_TJMAX_ENCODING;
+ out = bitmap_get_value(&raw, dts->id * 8, 8) - SOC_DTS_TJMAX_ENCODING;
*temp = sensors->tj_max - out * 1000;
return 0;
@@ -314,7 +314,7 @@ static int add_dts_thermal_zone(int id, struct intel_soc_dts_sensor_entry *dts,
trip_mask = 0;
else {
ptps = store_ptps;
- for_each_set_clump8(i, trip, &ptps, writable_trip_cnt * 8)
+ for_each_set_clump(i, trip, &ptps, writable_trip_cnt * 8, 8)
trip_mask &= ~BIT(i / 8);
}
dts->trip_mask = trip_mask;