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[1/2] media: imx-pxp: Fix routing configuration for i.MX7

Message ID 20200510223100.11641-2-laurent.pinchart@ideasonboard.com
State New
Headers show
Series [1/2] media: imx-pxp: Fix routing configuration for i.MX7 | expand

Commit Message

Laurent Pinchart May 10, 2020, 10:30 p.m. UTC
The PXP hangs without producing any frame on the i.MX7. This is caused
by a mismatch between the routing configuration and the modules
configuration. Fix the routing configuration by

- Selecting Composite Alpha Blending/Color Key 0 (main path) as the
  input to CSC2 (MUX6).
- Connecting the Rotation 0 block in the pipeline by feeding it with
  data (MUX12) and selecting its output (MUX14).
- Disabling all other muxes () by selecting the "no output" option. The
  datasheet doesn't explicitly require this, but the PXP has been
  noticed to hang after several hundreds frames when testing routing
  with the LUT disabled and the LUT input mux (MUX9) set to MUX8. It's
  thus safer to explicitly disable all unused paths.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
 drivers/media/platform/imx-pxp.c | 34 +++++++++++++++++++-------------
 1 file changed, 20 insertions(+), 14 deletions(-)
diff mbox series

Patch

diff --git a/drivers/media/platform/imx-pxp.c b/drivers/media/platform/imx-pxp.c
index 74e16011fc09..53e3f8c8435f 100644
--- a/drivers/media/platform/imx-pxp.c
+++ b/drivers/media/platform/imx-pxp.c
@@ -911,26 +911,32 @@  static int pxp_start(struct pxp_ctx *ctx, struct vb2_v4l2_buffer *in_vb,
 	/* bypass LUT */
 	pxp_write(dev, HW_PXP_LUT_CTRL, BM_PXP_LUT_CTRL_BYPASS);
 
+	/*
+	 * Configure routing, disabling all paths that are not used by
+	 * selecting the "no output" (3) option. The datasheet doesn't
+	 * explicitly require this, but the PXP has been seen to hand after
+	 * processing a few hundreds of frames otherwise.
+	 */
 	pxp_write(dev, HW_PXP_DATA_PATH_CTRL0,
-		  BF_PXP_DATA_PATH_CTRL0_MUX15_SEL(0)|
-		  BF_PXP_DATA_PATH_CTRL0_MUX14_SEL(1)|
-		  BF_PXP_DATA_PATH_CTRL0_MUX13_SEL(0)|
-		  BF_PXP_DATA_PATH_CTRL0_MUX12_SEL(0)|
+		  BF_PXP_DATA_PATH_CTRL0_MUX15_SEL(3)|
+		  BF_PXP_DATA_PATH_CTRL0_MUX14_SEL(0)|
+		  BF_PXP_DATA_PATH_CTRL0_MUX13_SEL(3)|
+		  BF_PXP_DATA_PATH_CTRL0_MUX12_SEL(1)|
 		  BF_PXP_DATA_PATH_CTRL0_MUX11_SEL(0)|
-		  BF_PXP_DATA_PATH_CTRL0_MUX10_SEL(0)|
+		  BF_PXP_DATA_PATH_CTRL0_MUX10_SEL(3)|
 		  BF_PXP_DATA_PATH_CTRL0_MUX9_SEL(1)|
 		  BF_PXP_DATA_PATH_CTRL0_MUX8_SEL(0)|
-		  BF_PXP_DATA_PATH_CTRL0_MUX7_SEL(0)|
-		  BF_PXP_DATA_PATH_CTRL0_MUX6_SEL(0)|
-		  BF_PXP_DATA_PATH_CTRL0_MUX5_SEL(0)|
-		  BF_PXP_DATA_PATH_CTRL0_MUX4_SEL(0)|
+		  BF_PXP_DATA_PATH_CTRL0_MUX7_SEL(3)|
+		  BF_PXP_DATA_PATH_CTRL0_MUX6_SEL(1)|
+		  BF_PXP_DATA_PATH_CTRL0_MUX5_SEL(3)|
+		  BF_PXP_DATA_PATH_CTRL0_MUX4_SEL(3)|
 		  BF_PXP_DATA_PATH_CTRL0_MUX3_SEL(0)|
-		  BF_PXP_DATA_PATH_CTRL0_MUX2_SEL(0)|
-		  BF_PXP_DATA_PATH_CTRL0_MUX1_SEL(0)|
-		  BF_PXP_DATA_PATH_CTRL0_MUX0_SEL(0));
+		  BF_PXP_DATA_PATH_CTRL0_MUX2_SEL(3)|
+		  BF_PXP_DATA_PATH_CTRL0_MUX1_SEL(3)|
+		  BF_PXP_DATA_PATH_CTRL0_MUX0_SEL(3));
 	pxp_write(dev, HW_PXP_DATA_PATH_CTRL1,
-		  BF_PXP_DATA_PATH_CTRL1_MUX17_SEL(1) |
-		  BF_PXP_DATA_PATH_CTRL1_MUX16_SEL(1));
+		  BF_PXP_DATA_PATH_CTRL1_MUX17_SEL(3) |
+		  BF_PXP_DATA_PATH_CTRL1_MUX16_SEL(3));
 
 	pxp_write(dev, HW_PXP_IRQ_MASK, 0xffff);