diff mbox series

[net-next,4/4] r8169: improve reset handling for chips from RTL8168g

Message ID fdeb08fa-854a-ba65-e257-8da0393da0cb@gmail.com
State New
Headers show
Series [net-next,1/4] r8169: add helper r8168g_wait_ll_share_fifo_ready | expand

Commit Message

Heiner Kallweit May 8, 2020, 9:32 p.m. UTC 
Sync the reset preparation for chips from RTL8168g with the r8168 and
r8125 vendor drivers.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
---
 drivers/net/ethernet/realtek/r8169_main.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
index 7ea58bd9b..0e96d0de2 100644
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -2537,10 +2537,13 @@  static void rtl8169_hw_reset(struct rtl8169_private *tp)
 		rtl_loop_wait_low(tp, &rtl_npq_cond, 20, 2000);
 		break;
 	case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_38:
-	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_52:
 		RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
 		rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666);
 		break;
+	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_61:
+		rtl_enable_rxdvgate(tp);
+		fsleep(2000);
+		break;
 	default:
 		RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
 		udelay(100);