| Message ID | 616c799433477943d782bda9d8a825d56fc70c9d.1587459886.git.baruch@tkos.co.il |
|---|---|
| State | New |
| Headers | show |
| Series | [net] net: phy: marvell10g: limit soft reset to 88x3310 | expand |
diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c index d3cb88651ad2..601686f64341 100644 --- a/drivers/net/phy/marvell10g.c +++ b/drivers/net/phy/marvell10g.c @@ -263,7 +263,8 @@ static int mv3310_power_up(struct phy_device *phydev) ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL, MV_V2_PORT_CTRL_PWRDOWN); - if (priv->firmware_ver < 0x00030000) + if (phydev->drv->phy_id != MARVELL_PHY_ID_88X3310 || + priv->firmware_ver < 0x00030000) return ret; return phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL,
The MV_V2_PORT_CTRL_SWRST bit in MV_V2_PORT_CTRL is reserved on 88E2110. Setting SWRST on 88E2110 breaks packets transfer after interface down/up cycle. Fixes: 8f48c2ac85ed ("net: marvell10g: soft-reset the PHY when coming out of low power") Signed-off-by: Baruch Siach <baruch@tkos.co.il> --- drivers/net/phy/marvell10g.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)