From patchwork Fri Jan 17 12:25:05 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanjun Guo X-Patchwork-Id: 23328 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ve0-f200.google.com (mail-ve0-f200.google.com [209.85.128.200]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 4E9A920540 for ; Fri, 17 Jan 2014 12:45:45 +0000 (UTC) Received: by mail-ve0-f200.google.com with SMTP id jw12sf6787154veb.3 for ; Fri, 17 Jan 2014 04:45:44 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=FR/CRIxay7QCdrnWt3zKXjEGaeIe0TT5NwV2nuZqcVo=; b=TjFZbACK99I42IqK1ZfXvzaAErzR+ldt5+uS4/vvyKrclynb+en5SyItAnTEn+es6/ 6Q15Aw6B3PzNiriyyPuCJXiNMleDmfSj0RSR4GFV8Cl79tl17YThU/07fBLEr15JPWiO lW6eJO4w5zzl54XMErKDwcJ8kVBke6IAdyU1/vrv91PEl5DGyemAXau8CVphabyxx8St 79yzJ4cSFnu083eD2d/0QPDY5UQtOdd4reYEXBjyuwL483G+RZmT4H/5BeqPNUL2TaEI Nhn+XZlKWGHxgIDxT0LOjF/PtBiDwIr/KgWitirS9Ml1j9qQlQCuRX+8WBInvBuUUo8K BFJw== X-Gm-Message-State: ALoCoQkrv/GBOb/PkBbQlKeBtd54vOOezFJSpE5hdvBoaCrSmOUuMEt/TsSH2B7Dyr1gaV+VItSu X-Received: by 10.58.201.133 with SMTP id ka5mr602700vec.4.1389962744500; Fri, 17 Jan 2014 04:45:44 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.35.208 with SMTP id n74ls428016qgn.65.gmail; Fri, 17 Jan 2014 04:45:44 -0800 (PST) X-Received: by 10.52.89.173 with SMTP id bp13mr685247vdb.5.1389962744299; Fri, 17 Jan 2014 04:45:44 -0800 (PST) Received: from mail-ve0-f174.google.com (mail-ve0-f174.google.com [209.85.128.174]) by mx.google.com with ESMTPS id a2si559530vea.105.2014.01.17.04.45.44 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 17 Jan 2014 04:45:44 -0800 (PST) Received-SPF: neutral (google.com: 209.85.128.174 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.174; Received: by mail-ve0-f174.google.com with SMTP id c14so1549844vea.19 for ; Fri, 17 Jan 2014 04:45:44 -0800 (PST) X-Received: by 10.58.243.37 with SMTP id wv5mr111842vec.41.1389962744230; Fri, 17 Jan 2014 04:45:44 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.59.13.131 with SMTP id ey3csp16951ved; Fri, 17 Jan 2014 04:45:43 -0800 (PST) X-Received: by 10.66.123.5 with SMTP id lw5mr1821233pab.83.1389962743167; Fri, 17 Jan 2014 04:45:43 -0800 (PST) Received: from mail-pd0-f176.google.com (mail-pd0-f176.google.com [209.85.192.176]) by mx.google.com with ESMTPS id ye6si10057404pbc.80.2014.01.17.04.45.42 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 17 Jan 2014 04:45:43 -0800 (PST) Received-SPF: neutral (google.com: 209.85.192.176 is neither permitted nor denied by best guess record for domain of hanjun.guo@linaro.org) client-ip=209.85.192.176; Received: by mail-pd0-f176.google.com with SMTP id r10so3958255pdi.7 for ; Fri, 17 Jan 2014 04:45:42 -0800 (PST) X-Received: by 10.66.255.39 with SMTP id an7mr1834123pad.7.1389962742668; Fri, 17 Jan 2014 04:45:42 -0800 (PST) Received: from localhost ([218.17.215.175]) by mx.google.com with ESMTPSA id xv2sm22497742pbb.39.2014.01.17.04.44.50 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 17 Jan 2014 04:45:41 -0800 (PST) From: Hanjun Guo To: "Rafael J. Wysocki" , Catalin Marinas , Will Deacon , Russell King - ARM Linux Cc: linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Grant Likely , Matthew Garrett , Olof Johansson , Linus Walleij , Bjorn Helgaas , Rob Herring , Mark Rutland , Arnd Bergmann , patches@linaro.org, linux-kernel@vger.kernel.org, linaro-kernel@lists.linaro.org, linaro-acpi@lists.linaro.org, Charles.Garcia-Tobin@arm.com, Hanjun Guo Subject: [PATCH 11/20] ARM64 / ACPI: Get the enable method for SMP initialization Date: Fri, 17 Jan 2014 20:25:05 +0800 Message-Id: <1389961514-13562-12-git-send-email-hanjun.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1389961514-13562-1-git-send-email-hanjun.guo@linaro.org> References: <1389961514-13562-1-git-send-email-hanjun.guo@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: hanjun.guo@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.174 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , ACPI has no flag to indicate different enable methods for SMP initialization, but it indicates that spin-table is supported at now because of the Parked Protocol shows that there is parked address in GIC structure. In order to boot the system with ACPI if DT is not available, we set the default enable method as spin-table since PSCI is not available in ACPI spec at now. Signed-off-by: Hanjun Guo --- arch/arm64/include/asm/acpi.h | 8 ++++++++ arch/arm64/include/asm/cpu_ops.h | 1 + arch/arm64/include/asm/smp.h | 2 +- arch/arm64/kernel/cpu_ops.c | 2 +- arch/arm64/kernel/smp.c | 42 ++++++++++++++++++++++++++++++++++++-- drivers/acpi/plat/arm-core.c | 26 +++++++++++++++++++++++ 6 files changed, 77 insertions(+), 4 deletions(-) diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index 7edd39e..097394c 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -87,11 +87,19 @@ extern int (*acpi_suspend_lowlevel)(void); extern int arm_cpu_to_apicid[NR_CPUS]; #define cpu_physical_id(cpu) arm_cpu_to_apicid[cpu] +extern const char *acpi_get_enable_method(int cpu); + #else /* !CONFIG_ACPI */ #define acpi_disabled 1 /* ACPI sometimes enabled on ARM */ #define acpi_noirq 1 /* ACPI sometimes enabled on ARM */ #define acpi_pci_disabled 1 /* ACPI PCI sometimes enabled on ARM */ #define acpi_strict 1 /* no ACPI spec workarounds on ARM */ + +static inline const char *acpi_get_enable_method(int cpu) +{ + return NULL; +} + #endif #endif /*_ASM_ARM64_ACPI_H*/ diff --git a/arch/arm64/include/asm/cpu_ops.h b/arch/arm64/include/asm/cpu_ops.h index c4cdb5e..08c8f07 100644 --- a/arch/arm64/include/asm/cpu_ops.h +++ b/arch/arm64/include/asm/cpu_ops.h @@ -53,6 +53,7 @@ struct cpu_operations { }; extern const struct cpu_operations *cpu_ops[NR_CPUS]; +extern const struct cpu_operations * __init cpu_get_ops(const char *name); extern int __init cpu_read_ops(struct device_node *dn, int cpu); extern void __init cpu_read_bootcpu_ops(void); diff --git a/arch/arm64/include/asm/smp.h b/arch/arm64/include/asm/smp.h index a498f2c..a5cea56 100644 --- a/arch/arm64/include/asm/smp.h +++ b/arch/arm64/include/asm/smp.h @@ -39,7 +39,7 @@ extern void show_ipi_list(struct seq_file *p, int prec); extern void handle_IPI(int ipinr, struct pt_regs *regs); /* - * Setup the set of possible CPUs (via set_cpu_possible) + * Platform specific SMP operations */ extern void smp_init_cpus(void); diff --git a/arch/arm64/kernel/cpu_ops.c b/arch/arm64/kernel/cpu_ops.c index d62d12f..531f2cc 100644 --- a/arch/arm64/kernel/cpu_ops.c +++ b/arch/arm64/kernel/cpu_ops.c @@ -35,7 +35,7 @@ static const struct cpu_operations *supported_cpu_ops[] __initconst = { NULL, }; -static const struct cpu_operations * __init cpu_get_ops(const char *name) +const struct cpu_operations * __init cpu_get_ops(const char *name) { const struct cpu_operations **ops = supported_cpu_ops; diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index a0c2ca6..7719d46 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -48,6 +48,7 @@ #include #include #include +#include /* * as from 2.5, kernels no longer have an init_tasks structure @@ -280,7 +281,7 @@ static void (*smp_cross_call)(const struct cpumask *, unsigned int); * cpu logical map array containing MPIDR values related to logical * cpus. Assumes that cpu_logical_map(0) has already been initialized. */ -void __init smp_init_cpus(void) +static int __init of_smp_init_cpus(void) { struct device_node *dn = NULL; unsigned int i, cpu = 1; @@ -364,6 +365,10 @@ next: cpu++; } + /* No device tree or no CPU node in DT */ + if (cpu == 1 && !bootcpu_valid) + return -ENODEV; + /* sanity check */ if (cpu > NR_CPUS) pr_warning("no. of cores (%d) greater than configured maximum of %d - clipping\n", @@ -371,7 +376,7 @@ next: if (!bootcpu_valid) { pr_err("DT missing boot CPU MPIDR, not enabling secondaries\n"); - return; + return -EINVAL; } /* @@ -381,6 +386,39 @@ next: for (i = 0; i < NR_CPUS; i++) if (cpu_logical_map(i) != INVALID_HWID) set_cpu_possible(i, true); + + return 0; +} + +/* + * In ACPI mode, the cpu possible map was enumerated before SMP + * initialization when MADT table was parsed, so we can get the + * possible map here to initialize CPUs. + */ +static void __init acpi_smp_init_cpus(void) +{ + int cpu; + const char *enable_method; + + for_each_possible_cpu(cpu) { + enable_method = acpi_get_enable_method(cpu); + if (!enable_method) + continue; + + cpu_ops[cpu] = cpu_get_ops(enable_method); + if (!cpu_ops[cpu]) + continue; + + cpu_ops[cpu]->cpu_init(NULL, cpu); + } +} + +void __init smp_init_cpus(void) +{ + if (!of_smp_init_cpus()) + return; + + acpi_smp_init_cpus(); } void __init smp_prepare_cpus(unsigned int max_cpus) diff --git a/drivers/acpi/plat/arm-core.c b/drivers/acpi/plat/arm-core.c index 1d9b789..2704633 100644 --- a/drivers/acpi/plat/arm-core.c +++ b/drivers/acpi/plat/arm-core.c @@ -367,6 +367,32 @@ static void __init acpi_process_madt(void) } /* + * To see PCSI is enabled or not. + * + * PSCI is not available for ACPI 5.0, return FALSE for now. + * + * FIXME: should we introduce early_param("psci", func) for test purpose? + */ +static bool acpi_psci_smp_available(int cpu) +{ + return FALSE; +} + +static const char *enable_method[] = { + "psci", + "spin-table", + NULL +}; + +const char *acpi_get_enable_method(int cpu) +{ + if (acpi_psci_smp_available(cpu)) + return enable_method[0]; + else + return enable_method[1]; +} + +/* * acpi_boot_table_init() and acpi_boot_init() * called from setup_arch(), always. * 1. checksums all tables