Message ID | 20200205020328.193225-7-sjg@chromium.org |
---|---|
State | New |
Headers | show |
Series | x86: coral: Add support for Cr50 | expand |
diff --git a/arch/x86/cpu/apollolake/Kconfig b/arch/x86/cpu/apollolake/Kconfig index a760e0ac68..6d6e98a589 100644 --- a/arch/x86/cpu/apollolake/Kconfig +++ b/arch/x86/cpu/apollolake/Kconfig @@ -40,6 +40,9 @@ config INTEL_APOLLOLAKE imply INTEL_GPIO imply SMP imply HAVE_ITSS + imply CLK + imply CMD_CLK + imply CLK_INTEL if INTEL_APOLLOLAKE diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index a1820fa187..a4a9e949e6 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -39,6 +39,11 @@ stdout-path = &serial; }; + clk: clock { + compatible = "intel,apl-clk"; + #clock-cells = <1>; + }; + cpus { u-boot,dm-pre-reloc; #address-cells = <1>;