| Message ID | 20200217173018.4306-2-marex@denx.de |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [V2,1/2] ARM: socfpga: Permit overriding the default timer frequency | expand |
> -----Original Message----- > From: Marek Vasut <marex at denx.de> > Sent: Tuesday, February 18, 2020 1:30 AM > To: u-boot at lists.denx.de > Cc: Marek Vasut <marex at denx.de>; Tan, Ley Foon > <ley.foon.tan at intel.com>; Simon Goldschmidt > <simon.k.r.goldschmidt at gmail.com> > Subject: [PATCH V2 2/2] ARM: socfpga: Add missing Denali NAND config > options > > The Denali SPL shim won't build without these options set, set them > accordingly to fix the build error and let the SPL shim to work correctly. > > Signed-off-by: Marek Vasut <marex at denx.de> > Cc: Ley Foon Tan <ley.foon.tan at intel.com> > Cc: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com> > --- > V2: No changes > --- > include/configs/socfpga_common.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/include/configs/socfpga_common.h > b/include/configs/socfpga_common.h > index 54a43569dc..29b0a5d69d 100644 > --- a/include/configs/socfpga_common.h > +++ b/include/configs/socfpga_common.h > @@ -121,6 +121,8 @@ > * NAND Support > */ > #ifdef CONFIG_NAND_DENALI > +#define CONFIG_SYS_NAND_USE_FLASH_BBT Didn't see Denali Nand driver use CONFIG_SYS_NAND_USE_FLASH_BBT. But, denali.c always set NAND_BBT_USE_FLASH flag. > +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 > #define CONFIG_SYS_MAX_NAND_DEVICE 1 > #define CONFIG_SYS_NAND_ONFI_DETECTION > #define CONFIG_SYS_NAND_REGS_BASE > SOCFPGA_NANDREGS_ADDRESS > -- Regards Ley Foon
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 54a43569dc..29b0a5d69d 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -121,6 +121,8 @@ * NAND Support */ #ifdef CONFIG_NAND_DENALI +#define CONFIG_SYS_NAND_USE_FLASH_BBT +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_NAND_REGS_BASE SOCFPGA_NANDREGS_ADDRESS
The Denali SPL shim won't build without these options set, set them accordingly to fix the build error and let the SPL shim to work correctly. Signed-off-by: Marek Vasut <marex at denx.de> Cc: Ley Foon Tan <ley.foon.tan at intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com> --- V2: No changes --- include/configs/socfpga_common.h | 2 ++ 1 file changed, 2 insertions(+)