diff mbox series

[16/16] arm64: zynqmp: Move pinctrl node under firmware node

Message ID 3729ff8ca7c8f1fbf851729bbe85e1743c1553e1.1582028304.git.michal.simek@xilinx.com
State Accepted
Commit 00fb945cf56bfe3d8ca7b1c2e38740c4c94a15c7
Headers show
Series xilinx: DT sync up | expand

Commit Message

Michal Simek Feb. 18, 2020, 12:20 p.m. UTC
Pinctrl is handled via firmare interface that's why move it there without
reg property and new compatible string.

Signed-off-by: Michal Simek <michal.simek at xilinx.com>
---

 arch/arm/dts/zynqmp.dtsi | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index d5bee2f448d1..93fdf6bfb8a8 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -167,6 +167,11 @@ 
 				compatible = "xlnx,zynqmp-reset";
 				#reset-cells = <1>;
 			};
+
+			pinctrl0: pinctrl {
+				compatible = "xlnx,zynqmp-pinctrl";
+				status = "disabled";
+			};
 		};
 	};
 
@@ -765,12 +770,6 @@ 
 			clock-output-names = "clk_out_sd1", "clk_in_sd1";
 		};
 
-		pinctrl0: pinctrl at ff180000 {
-			compatible = "xlnx,pinctrl-zynqmp";
-			status = "disabled";
-			reg = <0x0 0xff180000 0x0 0x1000>;
-		};
-
 		smmu: smmu at fd800000 {
 			compatible = "arm,mmu-500";
 			reg = <0x0 0xfd800000 0x0 0x20000>;