| Message ID | 1390518477-10020-1-git-send-email-linus.walleij@linaro.org |
|---|---|
| State | Accepted |
| Commit | 40d4d3319f4641af3341acd31ec875a1e649bdaa |
| Headers | show |
On Fri, Jan 24, 2014 at 12:07:57AM +0100, Linus Walleij wrote: Added Yoichi to cc. > When an IRQ is started on a GPIO line, mark this GPIO as IRQ in > the gpiolib so we can keep track of the usage centrally. > > Cc: Ralf Baechle <ralf@linux-mips.org> > Cc: linux-mips@linux-mips.org > Signed-off-by: Linus Walleij <linus.walleij@linaro.org> > --- > It would be much appreciated if one of the MIPS people could > test this patch, thanks in advance. (I did compile-test it > with a MIPS cross compiler.) > --- > drivers/gpio/gpio-vr41xx.c | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/drivers/gpio/gpio-vr41xx.c b/drivers/gpio/gpio-vr41xx.c > index b983bc079102..c6728cee0cfd 100644 > --- a/drivers/gpio/gpio-vr41xx.c > +++ b/drivers/gpio/gpio-vr41xx.c > @@ -80,6 +80,7 @@ static DEFINE_SPINLOCK(giu_lock); > static unsigned long giu_flags; > > static void __iomem *giu_base; > +static struct gpio_chip vr41xx_gpio_chip; > > #define giu_read(offset) readw(giu_base + (offset)) > #define giu_write(offset, value) writew((value), giu_base + (offset)) > @@ -134,12 +135,31 @@ static void unmask_giuint_low(struct irq_data *d) > giu_set(GIUINTENL, 1 << GPIO_PIN_OF_IRQ(d->irq)); > } > > +static unsigned int startup_giuint(struct irq_data *data) > +{ > + if (gpio_lock_as_irq(&vr41xx_gpio_chip, data->hwirq)) > + dev_err(vr41xx_gpio_chip.dev, > + "unable to lock HW IRQ %lu for IRQ\n", > + data->hwirq); > + /* Satisfy the .enable semantics by unmasking the line */ > + unmask_giuint_low(data); > + return 0; > +} > + > +static void shutdown_giuint(struct irq_data *data) > +{ > + mask_giuint_low(data); > + gpio_unlock_as_irq(&vr41xx_gpio_chip, data->hwirq); > +} > + > static struct irq_chip giuint_low_irq_chip = { > .name = "GIUINTL", > .irq_ack = ack_giuint_low, > .irq_mask = mask_giuint_low, > .irq_mask_ack = mask_ack_giuint_low, > .irq_unmask = unmask_giuint_low, > + .irq_startup = startup_giuint, > + .irq_shutdown = shutdown_giuint, > }; > > static void ack_giuint_high(struct irq_data *d) I haven't received any test results but as it's looking good I'm queueing this for 3.15. Thanks, Ralf -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Wed, Mar 19, 2014 at 6:00 PM, Ralf Baechle <ralf@linux-mips.org> wrote: > On Fri, Jan 24, 2014 at 12:07:57AM +0100, Linus Walleij wrote: > > Added Yoichi to cc. > >> When an IRQ is started on a GPIO line, mark this GPIO as IRQ in >> the gpiolib so we can keep track of the usage centrally. >> >> Cc: Ralf Baechle <ralf@linux-mips.org> >> Cc: linux-mips@linux-mips.org >> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> >> --- >> It would be much appreciated if one of the MIPS people could >> test this patch, thanks in advance. (I did compile-test it >> with a MIPS cross compiler.) >> --- > > I haven't received any test results but as it's looking good I'm queueing > this for 3.15. If it works I'd like to queue it through the GPIO tree actually, as I need to tweak it a bit to use the new resource callbacks from the IRQ tree. (But no big deal if you've already prepped your queue, I can fix this up later.) Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/gpio/gpio-vr41xx.c b/drivers/gpio/gpio-vr41xx.c index b983bc079102..c6728cee0cfd 100644 --- a/drivers/gpio/gpio-vr41xx.c +++ b/drivers/gpio/gpio-vr41xx.c @@ -80,6 +80,7 @@ static DEFINE_SPINLOCK(giu_lock); static unsigned long giu_flags; static void __iomem *giu_base; +static struct gpio_chip vr41xx_gpio_chip; #define giu_read(offset) readw(giu_base + (offset)) #define giu_write(offset, value) writew((value), giu_base + (offset)) @@ -134,12 +135,31 @@ static void unmask_giuint_low(struct irq_data *d) giu_set(GIUINTENL, 1 << GPIO_PIN_OF_IRQ(d->irq)); } +static unsigned int startup_giuint(struct irq_data *data) +{ + if (gpio_lock_as_irq(&vr41xx_gpio_chip, data->hwirq)) + dev_err(vr41xx_gpio_chip.dev, + "unable to lock HW IRQ %lu for IRQ\n", + data->hwirq); + /* Satisfy the .enable semantics by unmasking the line */ + unmask_giuint_low(data); + return 0; +} + +static void shutdown_giuint(struct irq_data *data) +{ + mask_giuint_low(data); + gpio_unlock_as_irq(&vr41xx_gpio_chip, data->hwirq); +} + static struct irq_chip giuint_low_irq_chip = { .name = "GIUINTL", .irq_ack = ack_giuint_low, .irq_mask = mask_giuint_low, .irq_mask_ack = mask_ack_giuint_low, .irq_unmask = unmask_giuint_low, + .irq_startup = startup_giuint, + .irq_shutdown = shutdown_giuint, }; static void ack_giuint_high(struct irq_data *d)
When an IRQ is started on a GPIO line, mark this GPIO as IRQ in the gpiolib so we can keep track of the usage centrally. Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- It would be much appreciated if one of the MIPS people could test this patch, thanks in advance. (I did compile-test it with a MIPS cross compiler.) --- drivers/gpio/gpio-vr41xx.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)