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[v2,1/7] x86: Allow building an SPL image for coreboot

Message ID 20200426133808.v2.1.If15050d853ccde22fe1c33ef5a37dce9db45e4e2@changeid
State Superseded
Headers show
Series x86: efi: Add a 64-bit coreboot payload | expand

Commit Message

Simon Glass April 26, 2020, 7:38 p.m. UTC 
Coreboot runs in 32-bit mode and cannot run a 64-bit U-Boot. To get around
this we can build a combined image with 32-bit SPL and 64-bit U-Boot. Add
a build rule and binman definition for this.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

Changes in v2: None

 Makefile                          |  6 ++++++
 arch/x86/cpu/coreboot/Kconfig     |  1 +
 arch/x86/dts/coreboot-u-boot.dtsi | 18 ++++++++++++++++++
 3 files changed, 25 insertions(+)
 create mode 100644 arch/x86/dts/coreboot-u-boot.dtsi
diff mbox series

Patch

diff --git a/Makefile b/Makefile
index b8a4b5058a..a6db812f6d 100644
--- a/Makefile
+++ b/Makefile
@@ -926,6 +926,9 @@  ALL-$(CONFIG_EFI_STUB) += u-boot-payload.efi
 ifneq ($(BUILD_ROM)$(CONFIG_BUILD_ROM),)
 ALL-$(CONFIG_X86_RESET_VECTOR) += u-boot.rom
 endif
+ifeq ($(CONFIG_SYS_COREBOOT)$(CONFIG_SPL),yy)
+ALL-$(CONFIG_BINMAN) += u-boot-x86-with-spl.bin
+endif
 
 # Build a combined spl + u-boot image for sunxi
 ifeq ($(CONFIG_ARCH_SUNXI)$(CONFIG_SPL),yy)
@@ -1611,6 +1614,9 @@  u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.itb FORCE
 endif
 endif
 
+u-boot-x86-with-spl.bin: spl/u-boot-spl.bin u-boot.bin FORCE
+	$(call if_changed,binman)
+
 ifneq ($(CONFIG_TEGRA),)
 ifneq ($(CONFIG_BINMAN),)
 # Makes u-boot-dtb-tegra.bin u-boot-tegra.bin u-boot-nodtb-tegra.bin
diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig
index c8e6a889d0..497d6284ac 100644
--- a/arch/x86/cpu/coreboot/Kconfig
+++ b/arch/x86/cpu/coreboot/Kconfig
@@ -25,5 +25,6 @@  config SYS_COREBOOT
 	imply FS_CBFS
 	imply CBMEM_CONSOLE
 	imply X86_TSC_READ_BASE
+	select BINMAN if X86_64
 
 endif
diff --git a/arch/x86/dts/coreboot-u-boot.dtsi b/arch/x86/dts/coreboot-u-boot.dtsi
new file mode 100644
index 0000000000..38efc48d83
--- /dev/null
+++ b/arch/x86/dts/coreboot-u-boot.dtsi
@@ -0,0 +1,18 @@ 
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Google LLC
+ * Written by Simon Glass <sjg at chromium.org>
+ */
+
+#include <config.h>
+
+/ {
+	binman {
+		filename = "u-boot-x86-with-spl.bin";
+		u-boot-spl {
+		};
+		u-boot {
+			offset = <0x10000>;
+		};
+	};
+};