Message ID | 6a926cd657d63147f49be2b0de293917c5b789e2.1579246289.git.michal.simek@xilinx.com |
---|---|
State | Accepted |
Commit | 65bcca9f52af8ff88d46de317a9ca6e8a2da5d69 |
Headers | show |
Series | versal: drivers: clk: Fix invalid clock name queries | expand |
diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c index 7e97b0c4bf3a..6ca46c612df8 100644 --- a/drivers/clk/clk_versal.c +++ b/drivers/clk/clk_versal.c @@ -569,6 +569,12 @@ static void versal_get_clock_info(void) continue; clock[i].valid = attr & CLK_VALID_MASK; + + /* skip query for Invalid clock */ + ret = versal_is_valid_clock(i); + if (ret != CLK_VALID_MASK) + continue; + clock[i].type = ((attr >> CLK_TYPE_SHIFT) & 0x1) ? CLK_TYPE_EXTERNAL : CLK_TYPE_OUTPUT; nodetype = (attr >> NODE_TYPE_SHIFT) & NODE_CLASS_MASK;