@@ -36,7 +36,8 @@
<&pwm_default_mode>,
<&adi1_default_mode>,
<&usbuicc_default_mode>,
- <&dmic_default_mode>;
+ <&dmic_default_mode>,
+ <&extcpena_default_mode>;
/*
* Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42
@@ -340,7 +341,19 @@
};
};
};
-
+ extcpena {
+ extcpena_default_mode: extcpena_default {
+ default_mux {
+ ste,function = "extcpena";
+ ste,pins = "extcpena_d_1";
+ };
+ default_cfg {
+ ste,pins = "GPIO34_R17";
+ input-enable;
+ bias-pull-down;
+ };
+ };
+ };
};
};
};
@@ -57,13 +57,6 @@ static struct pinctrl_map __initdata ab8500_pinmap[] = {
AB8500_PIN_STATE("GPIO3_U9", in_pd, "regulator.36", PINCTRL_STATE_SLEEP),
/*
- * pins 34 is muxed in EXTCPENA
- * configured INPUT PULL DOWN
- */
- AB8500_MUX_HOG("extcpena_d_1", "extcpena"),
- AB8500_PIN_HOG("GPIO34_R17", in_pd),
-
- /*
* pins 40 and 41 are muxed in MODCSLSDA
* configured INPUT PULL DOWN
*/
This moves the configuration of the AB8500 EXTCPENA pin from the board file to the device tree. Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- arch/arm/boot/dts/ste-href-ab8500.dtsi | 17 +++++++++++++++-- arch/arm/mach-ux500/board-mop500-pins.c | 7 ------- 2 files changed, 15 insertions(+), 9 deletions(-)