| Message ID | 20200605124500.17867-6-p.yadav@ti.com |
|---|---|
| State | New |
| Headers | show |
| Series | mtd: spi-nor-core: add xSPI Octal DTR support | expand |
diff --git a/configs/x530_defconfig b/configs/x530_defconfig index de077cb71f..0879cd235e 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -61,6 +61,7 @@ CONFIG_SYS_NAND_USE_FLASH_BBT=y CONFIG_NAND_PXA3XX=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_SPEED=50000000 +# CONFIG_SPI_FLASH_SMART_HWCAPS is not set CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y
The option SPI_FLASH_SMART_HWCAPS will be introduced in a future commit. It is enabled by default. It updates the hwcaps selection of SPI NOR to use the SPI MEM's supports_op() hook. But this leads to a code size increase and so the SPL binary exceeds the size limit. So, use the old hwcaps selection logic here to make sure the SPL size does not exceed the limit. Signed-off-by: Pratyush Yadav <p.yadav at ti.com> --- configs/x530_defconfig | 1 + 1 file changed, 1 insertion(+)