cmd: mmc: Cache-align extcsd read target

The extcsd read target must be cache aligned in case the controller
uses DMA to read the extcsd register, make it so.

Signed-off-by: Marek Vasut <marex at denx.de>
---
 cmd/mmc.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Hi

On Sat, Jun 20, 2020 at 2:28 PM Marek Vasut <marex at denx.de> wrote:
>
> The extcsd read target must be cache aligned in case the controller
> uses DMA to read the extcsd register, make it so.
>
> Signed-off-by: Marek Vasut <marex at denx.de>
> ---

I think commit message should be start with Fix

>  cmd/mmc.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/cmd/mmc.c b/cmd/mmc.c
> index 1c252e0502..1529a3e05d 100644
> --- a/cmd/mmc.c
> +++ b/cmd/mmc.c
> @@ -8,6 +8,7 @@
>  #include <blk.h>
>  #include <command.h>
>  #include <console.h>
> +#include <memalign.h>
>  #include <mmc.h>
>  #include <part.h>
>  #include <sparse_format.h>
> @@ -56,7 +57,8 @@ static void print_mmcinfo(struct mmc *mmc)
>         if (!IS_SD(mmc) && mmc->version >= MMC_VERSION_4_41) {
>                 bool has_enh = (mmc->part_support & ENHNCD_SUPPORT) != 0;
>                 bool usr_enh = has_enh && (mmc->part_attr & EXT_CSD_ENH_USR);
> -               u8 wp, ext_csd[MMC_MAX_BLOCK_LEN];
> +               ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
> +               u8 wp;
>                 int ret;
>
>  #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)

Reviewed-by: Michael Trimarchi <michael at amarulasolutions.com>
> --
> 2.27.0
>