diff mbox series

[v4,2/4] riscv: dts: hifive-unleashed-a00: add cpu aliases

Message ID 1592745008-17196-3-git-send-email-sagar.kadam@sifive.com
State Superseded
Headers show
Series update clock handler and proper cpu features | expand

Commit Message

Sagar Shrikant Kadam June 21, 2020, 1:10 p.m. UTC
Add cpu aliases to U-Boot specific dtsi for hifive-unleashed.
Without aliases we see that the CPU device sequence numbers are set
randomly and the cpu list/detail command will show it as follows:
=> cpu list
  1: cpu at 0      rv64imac
  0: cpu at 1      rv64imafdc
  2: cpu at 2      rv64imafdc
  3: cpu at 3      rv64imafdc
  4: cpu at 4      rv64imafdc

Seems like CPU probing with dm-model also relies on aliases as observed
in case spi. The fu540-c000-u-boot.dtsi has cpu0/1/2/3/4 nodes and so
adding corresponding aliases we can ensure that cpu devices are assigned
proper sequence as follows:
=> cpu list
  0: cpu at 0      rv64imac
  1: cpu at 1      rv64imafdc
  2: cpu at 2      rv64imafdc
  3: cpu at 3      rv64imafdc
  4: cpu at 4      rv64imafdc

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam at sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel at sifive.com>
---
 arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Bin Meng June 24, 2020, 1:21 a.m. UTC | #1
Hi Sagar,

On Sun, Jun 21, 2020 at 9:10 PM Sagar Shrikant Kadam
<sagar.kadam at sifive.com> wrote:
>
> Add cpu aliases to U-Boot specific dtsi for hifive-unleashed.
> Without aliases we see that the CPU device sequence numbers are set
> randomly and the cpu list/detail command will show it as follows:
> => cpu list
>   1: cpu at 0      rv64imac
>   0: cpu at 1      rv64imafdc
>   2: cpu at 2      rv64imafdc
>   3: cpu at 3      rv64imafdc
>   4: cpu at 4      rv64imafdc

Without this patch, my output does not show the cpu at 0 node in the "cpu
list" output.

Could you please clarify?

>
> Seems like CPU probing with dm-model also relies on aliases as observed
> in case spi. The fu540-c000-u-boot.dtsi has cpu0/1/2/3/4 nodes and so
> adding corresponding aliases we can ensure that cpu devices are assigned
> proper sequence as follows:
> => cpu list
>   0: cpu at 0      rv64imac
>   1: cpu at 1      rv64imafdc
>   2: cpu at 2      rv64imafdc
>   3: cpu at 3      rv64imafdc
>   4: cpu at 4      rv64imafdc
>
> Signed-off-by: Sagar Shrikant Kadam <sagar.kadam at sifive.com>
> Reviewed-by: Pragnesh Patel <pragnesh.patel at sifive.com>
> ---

Regards,
Bin
Sagar Shrikant Kadam June 24, 2020, 6:53 a.m. UTC | #2
Hi Bin,

> -----Original Message-----
> From: Bin Meng <bmeng.cn at gmail.com>
> Sent: Wednesday, June 24, 2020 6:52 AM
> To: Sagar Kadam <sagar.kadam at sifive.com>
> Cc: U-Boot Mailing List <u-boot at lists.denx.de>; Rick Chen
> <rick at andestech.com>; Lukasz Majewski <lukma at denx.de>; Jagan Teki
> <jagan at amarulasolutions.com>; Pragnesh Patel
> <pragnesh.patel at sifive.com>; Anup Patel <anup.patel at wdc.com>; Simon
> Glass <sjg at chromium.org>; Sean Anderson <seanga2 at gmail.com>
> Subject: Re: [PATCH v4 2/4] riscv: dts: hifive-unleashed-a00: add cpu aliases
> 
> [External Email] Do not click links or attachments unless you recognize the
> sender and know the content is safe
> 
> Hi Sagar,
> 
> On Sun, Jun 21, 2020 at 9:10 PM Sagar Shrikant Kadam
> <sagar.kadam at sifive.com> wrote:
> >
> > Add cpu aliases to U-Boot specific dtsi for hifive-unleashed.
> > Without aliases we see that the CPU device sequence numbers are set
> > randomly and the cpu list/detail command will show it as follows:
> > => cpu list
> >   1: cpu at 0      rv64imac
> >   0: cpu at 1      rv64imafdc
> >   2: cpu at 2      rv64imafdc
> >   3: cpu at 3      rv64imafdc
> >   4: cpu at 4      rv64imafdc
> 
> Without this patch, my output does not show the cpu at 0 node in the "cpu
> list" output.
> 
> Could you please clarify?

I guess my explanation for your query in cover letter follow's here to.
I will repost this based on spl.

Thanks,
Sagar

> 
> >
> > Seems like CPU probing with dm-model also relies on aliases as
> > observed in case spi. The fu540-c000-u-boot.dtsi has cpu0/1/2/3/4
> > nodes and so adding corresponding aliases we can ensure that cpu
> > devices are assigned proper sequence as follows:
> > => cpu list
> >   0: cpu at 0      rv64imac
> >   1: cpu at 1      rv64imafdc
> >   2: cpu at 2      rv64imafdc
> >   3: cpu at 3      rv64imafdc
> >   4: cpu at 4      rv64imafdc
> >
> > Signed-off-by: Sagar Shrikant Kadam <sagar.kadam at sifive.com>
> > Reviewed-by: Pragnesh Patel <pragnesh.patel at sifive.com>
> > ---
> 
> Regards,
> Bin
diff mbox series

Patch

diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
index 3038064..69a3cd3 100644
--- a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
+++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
@@ -8,6 +8,11 @@ 
 
 / {
 	aliases {
+		cpu0 = &cpu0;
+		cpu1 = &cpu1;
+		cpu2 = &cpu2;
+		cpu3 = &cpu3;
+		cpu4 = &cpu4;
 		spi0 = &qspi0;
 		spi2 = &qspi2;
 	};