| Message ID | 20200505122846.15992-2-peng.fan@nxp.com |
|---|---|
| State | Accepted |
| Commit | f44afd546f6236479581469e1fb969c9ce9f9eac |
| Headers | show |
| Series | imx: imx8qm/qxp update | expand |
> The DDR memory from 0x88000000 to 0x8FFFFFFF is assigned to M4 on > QM and QXP. The M4 can allocate this memory by two ways, > in SCD or u-boot. > In this patch, u-boot addes the memory reserve node to DTB to pass > the info to kernel, no matter the M4 memory is reserved in SCD > or u-boot. So kernel won't access M4 reserved memory. > Signed-off-by: Peng Fan <peng.fan at nxp.com> Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic
diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index 1f8add015f..69149d3cd5 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -41,6 +41,14 @@ config IMX_CONTAINER_CFG This is to specific the cfg file for generating container image which will be loaded by SPL. +config BOOTAUX_RESERVED_MEM_BASE + hex "i.MX auxiliary core dram memory base" + default 0 + +config BOOTAUX_RESERVED_MEM_SIZE + hex "i.MX auxiliary core dram memory size" + default 0 + choice prompt "i.MX8 board select" optional diff --git a/arch/arm/mach-imx/imx8/fdt.c b/arch/arm/mach-imx/imx8/fdt.c index 65c8ac1a7e..5993645378 100644 --- a/arch/arm/mach-imx/imx8/fdt.c +++ b/arch/arm/mach-imx/imx8/fdt.c @@ -8,6 +8,7 @@ #include <asm/arch/sys_proto.h> #include <dm/ofnode.h> #include <fdt_support.h> +#include <linux/libfdt.h> DECLARE_GLOBAL_DATA_PTR; @@ -279,6 +280,15 @@ static int ft_add_optee_node(void *fdt, bd_t *bd) int ft_system_setup(void *blob, bd_t *bd) { int ret; + int off; + + if (CONFIG_BOOTAUX_RESERVED_MEM_BASE) { + off = fdt_add_mem_rsv(blob, CONFIG_BOOTAUX_RESERVED_MEM_BASE, + CONFIG_BOOTAUX_RESERVED_MEM_SIZE); + if (off < 0) + printf("Failed to reserve memory for bootaux: %s\n", + fdt_strerror(off)); + } update_fdt_with_owned_resources(blob);
The DDR memory from 0x88000000 to 0x8FFFFFFF is assigned to M4 on QM and QXP. The M4 can allocate this memory by two ways, in SCD or u-boot. In this patch, u-boot addes the memory reserve node to DTB to pass the info to kernel, no matter the M4 memory is reserved in SCD or u-boot. So kernel won't access M4 reserved memory. Signed-off-by: Peng Fan <peng.fan at nxp.com> --- arch/arm/mach-imx/imx8/Kconfig | 8 ++++++++ arch/arm/mach-imx/imx8/fdt.c | 10 ++++++++++ 2 files changed, 18 insertions(+)