@@ -13,15 +13,40 @@
#include <asm/mach-types.h>
#include <asm/psci.h>
+#define DMM_INTERLEAVE_BASE (0xe0290020)
+#define DMM_INTERLEAVE_PER_CH_CFG (DMM_INTERLEAVE_BASE + 0x08)
+#define DMM_MASTER_READ_TO (DMM_INTERLEAVE_BASE + 0x48)
+
DECLARE_GLOBAL_DATA_PTR;
+unsigned int get_owl_ram_size(void)
+{
+ __maybe_unused unsigned int val, cap, channel, channel_num;
+
+ /* ddr capacity register initialized by ddr driver
+ * in early bootloader
+ */
+#if defined(CONFIG_MACH_S700)
+ val = (readl(DMM_INTERLEAVE_PER_CH_CFG) >> 8) & 0x7;
+ cap = (val + 1) * 256;
+#elif defined(CONFIG_MACH_S900)
+ channel_num = (readl(DMM_INTERLEAVE_BASE) >> 24) & 0xf;
+ channel = (channel_num >= 3) ? 1 : 0;
+ val = (readl(DMM_MASTER_READ_TO)) & 0xf;
+ cap = ((val + 1) << channel) * 256;
+#endif
+
+ return cap;
+}
+
/*
* dram_init - sets uboots idea of sdram size
*/
int dram_init(void)
{
- gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+ gd->ram_size = get_owl_ram_size() * 1024 * 1024;
return 0;
+
}
/* This is called after dram_init() so use get_ram_size result */
Calculate the SDRAM size from DDR capacity register registers instead of using hard-coded value. This is quite useful to get correct size on differnt boards based on Actions OWL family of SoCs (S700 and S900). There is no documentation available that talks about DDR registers, and this is very much taken from vendor source. This commit lets Linux boot on Cubieboard7-lite(based on S700). Signed-off-by: Amit Singh Tomar <amittomer25 at gmail.com> --- Changes since v2: * Fixed the variable name so that it can compile for S900. Changes since v1: * added support for S900 * updated the commit message to reflect common OWL support. --- arch/arm/mach-owl/soc.c | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-)