@@ -15,6 +15,16 @@
/delete-property/ serial1;
/delete-property/ serial2;
};
+
+ ethernet at 08000000 {
+ compatible = "smsc,lan9221","smsc,lan9115";
+ reg = <0x08000000 0xff>;
+ bank-width = <2>;
+ vddvario-supply = <&vddvario>;
+ vdd33a-supply = <&vdd33a>;
+ reg-io-width = <4>;
+ smsc,save-mac-address;
+ };
};
&gpio1 {
@@ -15,6 +15,16 @@
/delete-property/ serial1;
/delete-property/ serial2;
};
+
+ ethernet at 08000000 {
+ compatible = "smsc,lan9221","smsc,lan9115";
+ reg = <0x08000000 0xff>;
+ bank-width = <2>;
+ vddvario-supply = <&vddvario>;
+ vdd33a-supply = <&vdd33a>;
+ reg-io-width = <4>;
+ smsc,save-mac-address;
+ };
};
&gpio1 {
@@ -15,6 +15,16 @@
/delete-property/ serial1;
/delete-property/ serial2;
};
+
+ ethernet at 08000000 {
+ compatible = "smsc,lan9221","smsc,lan9115";
+ reg = <0x08000000 0xff>;
+ bank-width = <2>;
+ vddvario-supply = <&vddvario>;
+ vdd33a-supply = <&vdd33a>;
+ reg-io-width = <4>;
+ smsc,save-mac-address;
+ };
};
&gpio1 {
@@ -11,6 +11,18 @@
/delete-property/ serial1;
/delete-property/ serial2;
};
+
+ ethernet at 08000000 {
+ compatible = "smsc,lan9221","smsc,lan9115";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x08000000 0xff>;
+ bank-width = <2>;
+ vddvario-supply = <&vddvario>;
+ vdd33a-supply = <&vdd33a>;
+ reg-io-width = <4>;
+ smsc,save-mac-address;
+ };
};
&i2c1 {
@@ -14,7 +14,6 @@
#include <dm.h>
#include <init.h>
#include <ns16550.h>
-#include <netdev.h>
#include <flash.h>
#include <nand.h>
#include <i2c.h>
@@ -58,6 +57,8 @@ DECLARE_GLOBAL_DATA_PTR;
#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG6 0x09030000
#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG7 0x00000C50
+#define CONFIG_SMC911X_BASE 0x08000000
+
#ifdef CONFIG_SPL_OS_BOOT
int spl_start_uboot(void)
{
@@ -204,22 +205,6 @@ static void unlock_nand(void)
nand_unlock(mtd, 0, mtd->size, 0);
}
-int board_late_init(void)
-{
-#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
- unlock_nand();
-#endif
- return 0;
-}
-#endif
-
-#if defined(CONFIG_MMC)
-void board_mmc_power_init(void)
-{
- twl4030_power_mmc_init(0);
-}
-#endif
-
#ifdef CONFIG_SMC911X
/* GPMC CS1 settings for Logic SOM LV/Torpedo LAN92xx Ethernet chip */
static const u32 gpmc_lan92xx_config[] = {
@@ -230,12 +215,25 @@ static const u32 gpmc_lan92xx_config[] = {
NET_LAN92XX_GPMC_CONFIG5,
NET_LAN92XX_GPMC_CONFIG6,
};
+#endif
-int board_eth_init(bd_t *bis)
+int board_late_init(void)
{
+#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
+ unlock_nand();
+#endif
+
+#ifdef CONFIG_SMC911X
enable_gpmc_cs_config(gpmc_lan92xx_config, &gpmc_cfg->cs[1],
CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
+#endif
+ return 0;
+}
+#endif
- return smc911x_initialize(0, CONFIG_SMC911X_BASE);
+#if defined(CONFIG_MMC)
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(0);
}
#endif
@@ -56,8 +56,8 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_DM_ETH=y
CONFIG_SMC911X=y
-CONFIG_SMC911X_BASE=0x08000000
CONFIG_SMC911X_32_BIT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_SINGLE=y
@@ -60,8 +60,8 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_DM_ETH=y
CONFIG_SMC911X=y
-CONFIG_SMC911X_BASE=0x08000000
CONFIG_SMC911X_32_BIT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_SINGLE=y
@@ -55,8 +55,8 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_DM_ETH=y
CONFIG_SMC911X=y
-CONFIG_SMC911X_BASE=0x08000000
CONFIG_SMC911X_32_BIT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_SINGLE=y
@@ -62,8 +62,8 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_DM_ETH=y
CONFIG_SMC911X=y
-CONFIG_SMC911X_BASE=0x08000000
CONFIG_SMC911X_32_BIT=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_SINGLE=y
With the converstion of SMC911x to DM, this can facilitate the omap3 boards from LogicPD (now called Beacon EmbeddedWorks) to be converted. There isn't a clean solution to doing this in phases, so the boards are all being done together to avoid breaking functionality. Because the GPMC bus hasn't been converted, the -u-boot.dtsi node needs to show the address of the ethernet controller for each board. The board file, which is common betwen the OMAP35 and DM37 SOM LV and Torpedo boards, can remove the manual ethernet initialization, but it still needs to register the address and GPMC configuration for the Ethernet controller which is now being moved around to board_late_init(). Lastly, this patch updates the various config files to add the reference for DM_ETH and remove the SMC address, which is now fetched from the newly created device tree nodes. Signed-off-by: Adam Ford <aford173 at gmail.com> --- V2: Rebase on master, fix dtb warnings