| Message ID | 20200514095912.14428-2-sr@denx.de |
|---|---|
| State | New |
| Headers | show |
| Series | mips: Add initial Octeon MIPS64 base support | expand |
diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S index 6de9a2f362..f601662cd0 100644 --- a/arch/mips/cpu/start.S +++ b/arch/mips/cpu/start.S @@ -222,6 +222,10 @@ wr_done: #ifdef CONFIG_MIPS_SRAM_INIT /* Initialize the SRAM first */ PTR_LA t9, mips_sram_init +#ifdef CONFIG_MIPS_INIT_JUMP_OFFSET + PTR_SUBU \ + t9, t9, (CONFIG_SYS_TEXT_BASE - CONFIG_MIPS_INIT_JUMP_OFFSET) +#endif jalr t9 nop #endif
This Kconfig symbol will be introduced with the base Octeon MIPS support. Using it, its possible to use a TEXT_BASE address which differs from the reset PC. And with the earliest function call to mips_sram_init() the CPU will transfer execution to the actual TEXT_BASE region. So after returning from this function, all absolute addresses are okay again. This will be used by the Octeon platform to copy the U-Boot image into L2 cache and transfer execution to the cache to speed up the execution. Signed-off-by: Stefan Roese <sr at denx.de> --- Changes in v2: - New patch arch/mips/cpu/start.S | 4 ++++ 1 file changed, 4 insertions(+)