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[209.132.180.131]) by mx.google.com with ESMTPS id s1si135543pav.219.2014.02.19.07.40.16 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 19 Feb 2014 07:40:17 -0800 (PST) Received-SPF: pass (google.com: domain of libc-alpha-return-47458-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Received: (qmail 14925 invoked by alias); 19 Feb 2014 15:40:07 -0000 Mailing-List: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org Precedence: list List-Id: List-Unsubscribe: , List-Subscribe: List-Archive: List-Post: , List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 14913 invoked by uid 89); 19 Feb 2014 15:40:06 -0000 X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.4 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-wi0-f180.google.com X-Received: by 10.180.87.162 with SMTP id az2mr2110348wib.23.1392824401953; Wed, 19 Feb 2014 07:40:01 -0800 (PST) From: Will Newton To: libc-alpha@sourceware.org Subject: [PATCH v3] ARM: Add SystemTap probes to longjmp and setjmp. Date: Wed, 19 Feb 2014 15:39:55 +0000 Message-Id: <1392824395-1406-1-git-send-email-will.newton@linaro.org> X-Original-Sender: will.newton@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c03::233 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org; dkim=pass header.i=@sourceware.org X-Google-Group-Id: 836684582541 Now the ARM port implements pointer encryption for jmpbufs, gdb needs a SystemTap probe point in longjmp to determine the target PC of a call to longjmp. This patch implements the probe point in longjmp and a similar probe point in setjmp. In order to have all the appropriate registers available to pass to the probe this reorders the layout of jmpbuf, putting the sp and lr registers at the start rather than the end, allowing them to be read and written sequentially. Tested on armv7, no new failures in the glibc testsuite and confirmed that this fixes the gdb.base/longjmp.exp failures in the gdb testsuite. ChangeLog: 2014-01-27 Will Newton * sysdeps/arm/__longjmp.S: Include stap-probe.h. (__longjmp): Restore sp and lr before restoring callee saved registers. Add longjmp and longjmp_target SystemTap probe point. * sysdeps/arm/include/bits/setjmp.h (__JMP_BUF_SP): Define to zero to match jmpbuf layout. * sysdeps/arm/setjmp.S: Include stap-probe.h. (__sigsetjmp): Save sp and lr before saving callee saved registers. Add setjmp SystemTap probe point. --- sysdeps/arm/__longjmp.S | 61 ++++++++++++++++++++++++--------------- sysdeps/arm/include/bits/setjmp.h | 2 +- sysdeps/arm/setjmp.S | 12 ++++++-- 3 files changed, 47 insertions(+), 28 deletions(-) Changes in v3: - Rebase onto master after move from ports diff --git a/sysdeps/arm/__longjmp.S b/sysdeps/arm/__longjmp.S index 27c57a1..08521e5 100644 --- a/sysdeps/arm/__longjmp.S +++ b/sysdeps/arm/__longjmp.S @@ -17,6 +17,7 @@ . */ #include +#include #include #include #include @@ -25,31 +26,35 @@ ENTRY (__longjmp) mov ip, r0 - movs r0, r1 /* get the return value in place */ - it eq - moveq r0, #1 /* can't let setjmp() return zero! */ #ifdef CHECK_SP sfi_breg ip, \ - ldr r4, [\B, #32] /* jmpbuf's sp */ + ldr r4, [\B] /* jmpbuf's sp */ cfi_undefined (r4) #ifdef PTR_DEMANGLE PTR_DEMANGLE (r4, r4, a3, a4) #endif CHECK_SP (r4) #endif - sfi_sp sfi_breg ip, \ - ldmia \B!, JMP_BUF_REGLIST + #ifdef PTR_DEMANGLE ldr a4, [ip], #4 - PTR_DEMANGLE (a4, a4, a3, a2) - mov sp, a4 - ldr a4, [ip], #4 - PTR_DEMANGLE2 (lr, a4, a3) + PTR_DEMANGLE (a4, a4, a3, r4) + cfi_undefined (r4) + ldr r4, [ip], #4 + PTR_DEMANGLE2 (r4, r4, a3) #else - ldr sp, [ip], #4 - ldr lr, [ip], #4 + ldr a4, [ip], #4 + ldr r4, [ip], #4 + cfi_undefined (r4) #endif + /* longjmp probe expects longjmp first argument (4@r0), second + argument (-4@r1), and target address (4@r4), respectively. */ + LIBC_PROBE (longjmp, 3, 4@r0, -4@r1, 4@r4) + mov sp, a4 + mov lr, r4 + sfi_sp sfi_breg ip, \ + ldmia \B!, JMP_BUF_REGLIST cfi_restore (v1) cfi_restore (v2) cfi_restore (v3) @@ -67,27 +72,27 @@ ENTRY (__longjmp) #ifdef NEED_HWCAP # ifdef IS_IN_rtld - ldr a2, 1f + ldr a4, 1f ldr a3, .Lrtld_local_ro -0: add a2, pc, a2 - add a2, a2, a3 - ldr a2, [a2, #RTLD_GLOBAL_RO_DL_HWCAP_OFFSET] +0: add a4, pc, a4 + add a4, a4, a3 + ldr a4, [a4, #RTLD_GLOBAL_RO_DL_HWCAP_OFFSET] # else # ifdef PIC - ldr a2, 1f + ldr a4, 1f ldr a3, .Lrtld_global_ro -0: add a2, pc, a2 - ldr a2, [a2, a3] - ldr a2, [a2, #RTLD_GLOBAL_RO_DL_HWCAP_OFFSET] +0: add a4, pc, a4 + ldr a4, [a4, a3] + ldr a4, [a4, #RTLD_GLOBAL_RO_DL_HWCAP_OFFSET] # else - ldr a2, .Lhwcap - ldr a2, [a2, #0] + ldr a4, .Lhwcap + ldr a4, [a4, #0] # endif # endif #endif #ifdef __SOFTFP__ - tst a2, #HWCAP_ARM_VFP + tst a4, #HWCAP_ARM_VFP beq .Lno_vfp #endif @@ -98,7 +103,7 @@ ENTRY (__longjmp) .Lno_vfp: #ifndef ARM_ASSUME_NO_IWMMXT - tst a2, #HWCAP_ARM_IWMMXT + tst a4, #HWCAP_ARM_IWMMXT beq .Lno_iwmmxt /* Restore the call-preserved iWMMXt registers. */ @@ -118,6 +123,14 @@ ENTRY (__longjmp) .Lno_iwmmxt: #endif + /* longjmp_target probe expects longjmp first argument (4@r0), second + argument (-4@r1), and target address (4@r14), respectively. */ + LIBC_PROBE (longjmp_target, 3, 4@r0, -4@r1, 4@r14) + + movs r0, r1 /* get the return value in place */ + it eq + moveq r0, #1 /* can't let setjmp() return zero! */ + DO_RET(lr) #ifdef NEED_HWCAP diff --git a/sysdeps/arm/include/bits/setjmp.h b/sysdeps/arm/include/bits/setjmp.h index 220dfe8..5877c1f 100644 --- a/sysdeps/arm/include/bits/setjmp.h +++ b/sysdeps/arm/include/bits/setjmp.h @@ -30,7 +30,7 @@ # define JMP_BUF_REGLIST {v1-v6, sl, fp} /* Index of __jmp_buf where the sp register resides. */ -# define __JMP_BUF_SP 8 +# define __JMP_BUF_SP 0 #endif #endif /* include/bits/setjmp.h */ diff --git a/sysdeps/arm/setjmp.S b/sysdeps/arm/setjmp.S index b0b45ed..5e55ca5 100644 --- a/sysdeps/arm/setjmp.S +++ b/sysdeps/arm/setjmp.S @@ -17,6 +17,7 @@ . */ #include +#include #include #include #include @@ -27,9 +28,11 @@ ENTRY (__sigsetjmp) #endif mov ip, r0 - /* Save registers */ - sfi_breg ip, \ - stmia \B!, JMP_BUF_REGLIST + /* setjmp probe expects sigsetjmp first argument (4@r0), second + argument (-4@r1), and target address (4@r14), respectively. */ + LIBC_PROBE (setjmp, 3, 4@r0, -4@r1, 4@r14) + + /* Save sp and lr */ #ifdef PTR_MANGLE mov a4, sp PTR_MANGLE2 (a4, a4, a3) @@ -40,6 +43,9 @@ ENTRY (__sigsetjmp) str sp, [ip], #4 str lr, [ip], #4 #endif + /* Save registers */ + sfi_breg ip, \ + stmia \B!, JMP_BUF_REGLIST #if !defined ARM_ASSUME_NO_IWMMXT || defined __SOFTFP__ # define NEED_HWCAP 1