| Message ID | 20200912140730.2.I33e571179986850b4ec17042e813d0b08fb1b9c1@changeid |
|---|---|
| State | Accepted |
| Commit | 14ac4e049dc1183440960f177b60b54357e54d90 |
| Headers | show |
| Series | [1/3] spi: spi-geni-qcom: Use the FIFO even more | expand |
On Sat 12 Sep 16:08 CDT 2020, Douglas Anderson wrote: > We always toggle the chip select manually in spi-geni-qcom so that we > can properly implement the Linux API. There's no reason to program > this to the hardware on every transfer. Program it once at init and > be done with it. > > This saves some part of a microsecond of overhead on each transfer. > While not really noticeable on any real world benchmarks, we might as > well save the time. > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn > Signed-off-by: Douglas Anderson <dianders@chromium.org> > --- > > drivers/spi/spi-geni-qcom.c | 12 +++++++----- > 1 file changed, 7 insertions(+), 5 deletions(-) > > diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c > index 7f0bf0dec466..92d88bf85a90 100644 > --- a/drivers/spi/spi-geni-qcom.c > +++ b/drivers/spi/spi-geni-qcom.c > @@ -290,6 +290,7 @@ static int spi_geni_init(struct spi_geni_master *mas) > { > struct geni_se *se = &mas->se; > unsigned int proto, major, minor, ver; > + u32 spi_tx_cfg; > > pm_runtime_get_sync(mas->dev); > > @@ -322,6 +323,11 @@ static int spi_geni_init(struct spi_geni_master *mas) > > geni_se_select_mode(se, GENI_SE_FIFO); > > + /* We always control CS manually */ > + spi_tx_cfg = readl(se->base + SE_SPI_TRANS_CFG); > + spi_tx_cfg &= ~CS_TOGGLE; > + writel(spi_tx_cfg, se->base + SE_SPI_TRANS_CFG); > + > pm_runtime_put(mas->dev); > return 0; > } > @@ -331,7 +337,7 @@ static void setup_fifo_xfer(struct spi_transfer *xfer, > u16 mode, struct spi_master *spi) > { > u32 m_cmd = 0; > - u32 spi_tx_cfg, len; > + u32 len; > struct geni_se *se = &mas->se; > int ret; > > @@ -350,7 +356,6 @@ static void setup_fifo_xfer(struct spi_transfer *xfer, > spin_lock_irq(&mas->lock); > spin_unlock_irq(&mas->lock); > > - spi_tx_cfg = readl(se->base + SE_SPI_TRANS_CFG); > if (xfer->bits_per_word != mas->cur_bits_per_word) { > spi_setup_word_len(mas, mode, xfer->bits_per_word); > mas->cur_bits_per_word = xfer->bits_per_word; > @@ -364,8 +369,6 @@ static void setup_fifo_xfer(struct spi_transfer *xfer, > mas->tx_rem_bytes = 0; > mas->rx_rem_bytes = 0; > > - spi_tx_cfg &= ~CS_TOGGLE; > - > if (!(mas->cur_bits_per_word % MIN_WORD_LEN)) > len = xfer->len * BITS_PER_BYTE / mas->cur_bits_per_word; > else > @@ -384,7 +387,6 @@ static void setup_fifo_xfer(struct spi_transfer *xfer, > writel(len, se->base + SE_SPI_RX_TRANS_LEN); > mas->rx_rem_bytes = xfer->len; > } > - writel(spi_tx_cfg, se->base + SE_SPI_TRANS_CFG); > > /* > * Lock around right before we start the transfer since our > -- > 2.28.0.618.gf4bc123cb7-goog >
On 9/13/2020 2:38 AM, Douglas Anderson wrote: > We always toggle the chip select manually in spi-geni-qcom so that we > can properly implement the Linux API. There's no reason to program > this to the hardware on every transfer. Program it once at init and > be done with it. > > This saves some part of a microsecond of overhead on each transfer. > While not really noticeable on any real world benchmarks, we might as > well save the time. Yeah this is configuration part, can be moved to one time init function, as per HPG CS_TOGGLE bit of SPI_TRANS_CFG register is used to instruct FW to toggle CS line btw each words. We never came across any usecase/slave who needs this. Reviewed-by: Akash Asthana <akashast@codeaurora.org> > Signed-off-by: Douglas Anderson <dianders@chromium.org> > --- > > drivers/spi/spi-geni-qcom.c | 12 +++++++----- > 1 file changed, 7 insertions(+), 5 deletions(-) > > diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c > index 7f0bf0dec466..92d88bf85a90 100644 > --- a/drivers/spi/spi-geni-qcom.c > +++ b/drivers/spi/spi-geni-qcom.c > @@ -290,6 +290,7 @@ static int spi_geni_init(struct spi_geni_master *mas) > { > struct geni_se *se = &mas->se; > unsigned int proto, major, minor, ver; > + u32 spi_tx_cfg; > > pm_runtime_get_sync(mas->dev); > > @@ -322,6 +323,11 @@ static int spi_geni_init(struct spi_geni_master *mas) > > geni_se_select_mode(se, GENI_SE_FIFO); > > + /* We always control CS manually */ > + spi_tx_cfg = readl(se->base + SE_SPI_TRANS_CFG); > + spi_tx_cfg &= ~CS_TOGGLE; > + writel(spi_tx_cfg, se->base + SE_SPI_TRANS_CFG); > + > pm_runtime_put(mas->dev); > return 0; > } > @@ -331,7 +337,7 @@ static void setup_fifo_xfer(struct spi_transfer *xfer, > u16 mode, struct spi_master *spi) > { > u32 m_cmd = 0; > - u32 spi_tx_cfg, len; > + u32 len; > struct geni_se *se = &mas->se; > int ret; > > @@ -350,7 +356,6 @@ static void setup_fifo_xfer(struct spi_transfer *xfer, > spin_lock_irq(&mas->lock); > spin_unlock_irq(&mas->lock); > > - spi_tx_cfg = readl(se->base + SE_SPI_TRANS_CFG); > if (xfer->bits_per_word != mas->cur_bits_per_word) { > spi_setup_word_len(mas, mode, xfer->bits_per_word); > mas->cur_bits_per_word = xfer->bits_per_word; > @@ -364,8 +369,6 @@ static void setup_fifo_xfer(struct spi_transfer *xfer, > mas->tx_rem_bytes = 0; > mas->rx_rem_bytes = 0; > > - spi_tx_cfg &= ~CS_TOGGLE; > - > if (!(mas->cur_bits_per_word % MIN_WORD_LEN)) > len = xfer->len * BITS_PER_BYTE / mas->cur_bits_per_word; > else > @@ -384,7 +387,6 @@ static void setup_fifo_xfer(struct spi_transfer *xfer, > writel(len, se->base + SE_SPI_RX_TRANS_LEN); > mas->rx_rem_bytes = xfer->len; > } > - writel(spi_tx_cfg, se->base + SE_SPI_TRANS_CFG); > > /* > * Lock around right before we start the transfer since our
diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c index 7f0bf0dec466..92d88bf85a90 100644 --- a/drivers/spi/spi-geni-qcom.c +++ b/drivers/spi/spi-geni-qcom.c @@ -290,6 +290,7 @@ static int spi_geni_init(struct spi_geni_master *mas) { struct geni_se *se = &mas->se; unsigned int proto, major, minor, ver; + u32 spi_tx_cfg; pm_runtime_get_sync(mas->dev); @@ -322,6 +323,11 @@ static int spi_geni_init(struct spi_geni_master *mas) geni_se_select_mode(se, GENI_SE_FIFO); + /* We always control CS manually */ + spi_tx_cfg = readl(se->base + SE_SPI_TRANS_CFG); + spi_tx_cfg &= ~CS_TOGGLE; + writel(spi_tx_cfg, se->base + SE_SPI_TRANS_CFG); + pm_runtime_put(mas->dev); return 0; } @@ -331,7 +337,7 @@ static void setup_fifo_xfer(struct spi_transfer *xfer, u16 mode, struct spi_master *spi) { u32 m_cmd = 0; - u32 spi_tx_cfg, len; + u32 len; struct geni_se *se = &mas->se; int ret; @@ -350,7 +356,6 @@ static void setup_fifo_xfer(struct spi_transfer *xfer, spin_lock_irq(&mas->lock); spin_unlock_irq(&mas->lock); - spi_tx_cfg = readl(se->base + SE_SPI_TRANS_CFG); if (xfer->bits_per_word != mas->cur_bits_per_word) { spi_setup_word_len(mas, mode, xfer->bits_per_word); mas->cur_bits_per_word = xfer->bits_per_word; @@ -364,8 +369,6 @@ static void setup_fifo_xfer(struct spi_transfer *xfer, mas->tx_rem_bytes = 0; mas->rx_rem_bytes = 0; - spi_tx_cfg &= ~CS_TOGGLE; - if (!(mas->cur_bits_per_word % MIN_WORD_LEN)) len = xfer->len * BITS_PER_BYTE / mas->cur_bits_per_word; else @@ -384,7 +387,6 @@ static void setup_fifo_xfer(struct spi_transfer *xfer, writel(len, se->base + SE_SPI_RX_TRANS_LEN); mas->rx_rem_bytes = xfer->len; } - writel(spi_tx_cfg, se->base + SE_SPI_TRANS_CFG); /* * Lock around right before we start the transfer since our
We always toggle the chip select manually in spi-geni-qcom so that we can properly implement the Linux API. There's no reason to program this to the hardware on every transfer. Program it once at init and be done with it. This saves some part of a microsecond of overhead on each transfer. While not really noticeable on any real world benchmarks, we might as well save the time. Signed-off-by: Douglas Anderson <dianders@chromium.org> --- drivers/spi/spi-geni-qcom.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-)