diff mbox series

[v4,6/7] irqchip: qcom-pdc: Unmask wake up irqs during suspend

Message ID 1597058460-16211-7-git-send-email-mkshah@codeaurora.org
State New
Headers show
Series None | expand

Commit Message

Maulik Shah Aug. 10, 2020, 11:20 a.m. UTC 
From: Douglas Anderson <dianders@chromium.org>

An interrupt that is masked but set for wakeup still needs to be able
to wake up the system.  Use the new irq_suspend_one() and
irq_resume_one() callback to handle this by unmasking at the hardware
level at suspend time and putting things back at resume time.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
---
 drivers/irqchip/qcom-pdc.c | 51 ++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 49 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c
index c1c5dfa..dfcdfc5 100644
--- a/drivers/irqchip/qcom-pdc.c
+++ b/drivers/irqchip/qcom-pdc.c
@@ -3,6 +3,7 @@ 
  * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
  */
 
+#include <linux/bitops.h>
 #include <linux/err.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
@@ -38,6 +39,9 @@  struct pdc_pin_region {
 	u32 cnt;
 };
 
+static DECLARE_BITMAP(pdc_wake_irqs, PDC_MAX_IRQS);
+static DECLARE_BITMAP(pdc_disabled_irqs, PDC_MAX_IRQS);
+
 static DEFINE_RAW_SPINLOCK(pdc_lock);
 static void __iomem *pdc_base;
 static struct pdc_pin_region *pdc_region;
@@ -89,11 +93,51 @@  static void pdc_enable_intr(struct irq_data *d, bool on)
 	raw_spin_unlock(&pdc_lock);
 }
 
+static void qcom_pdc_irq_suspend_one(struct irq_data *d)
+{
+	if (d->hwirq == GPIO_NO_WAKE_IRQ)
+		return;
+
+	if (test_bit(d->hwirq, pdc_wake_irqs) &&
+	    test_bit(d->hwirq, pdc_disabled_irqs)) {
+		/*
+		 * Disabled interrupts that have wake enabled need to be able
+		 * to wake us up from suspend.  Unmask them now to enable
+		 * this.
+		 */
+		pdc_enable_intr(d, true);
+		irq_chip_unmask_parent(d);
+	}
+}
+
+static void qcom_pdc_irq_resume_one(struct irq_data *d)
+{
+	if (d->hwirq == GPIO_NO_WAKE_IRQ)
+		return;
+
+	if (test_bit(d->hwirq, pdc_wake_irqs) &&
+	    test_bit(d->hwirq, pdc_disabled_irqs)) {
+		irq_chip_mask_parent(d);
+		pdc_enable_intr(d, false);
+	}
+}
+
+static int qcom_pdc_gic_set_wake(struct irq_data *d, unsigned int on)
+{
+	if (on)
+		set_bit(d->hwirq, pdc_wake_irqs);
+	else
+		clear_bit(d->hwirq, pdc_wake_irqs);
+
+	return irq_chip_set_wake_parent(d, on);
+}
+
 static void qcom_pdc_gic_disable(struct irq_data *d)
 {
 	if (d->hwirq == GPIO_NO_WAKE_IRQ)
 		return;
 
+	set_bit(d->hwirq, pdc_disabled_irqs);
 	pdc_enable_intr(d, false);
 	irq_chip_disable_parent(d);
 }
@@ -103,6 +147,7 @@  static void qcom_pdc_gic_enable(struct irq_data *d)
 	if (d->hwirq == GPIO_NO_WAKE_IRQ)
 		return;
 
+	clear_bit(d->hwirq, pdc_disabled_irqs);
 	pdc_enable_intr(d, true);
 	irq_chip_enable_parent(d);
 }
@@ -201,13 +246,15 @@  static struct irq_chip qcom_pdc_gic_chip = {
 	.irq_unmask		= qcom_pdc_gic_unmask,
 	.irq_disable		= qcom_pdc_gic_disable,
 	.irq_enable		= qcom_pdc_gic_enable,
+	.irq_set_wake		= qcom_pdc_gic_set_wake,
+	.irq_suspend_one	= qcom_pdc_irq_suspend_one,
+	.irq_resume_one		= qcom_pdc_irq_resume_one,
 	.irq_get_irqchip_state	= qcom_pdc_gic_get_irqchip_state,
 	.irq_set_irqchip_state	= qcom_pdc_gic_set_irqchip_state,
 	.irq_retrigger		= irq_chip_retrigger_hierarchy,
 	.irq_set_type		= qcom_pdc_gic_set_type,
 	.flags			= IRQCHIP_MASK_ON_SUSPEND |
-				  IRQCHIP_SET_TYPE_MASKED |
-				  IRQCHIP_SKIP_SET_WAKE,
+				  IRQCHIP_SET_TYPE_MASKED,
 	.irq_set_vcpu_affinity	= irq_chip_set_vcpu_affinity_parent,
 	.irq_set_affinity	= irq_chip_set_affinity_parent,
 };