From patchwork Thu Aug 20 09:40:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TGlnaHQgSHNpZWggKOisneaYjueHiCk=?= X-Patchwork-Id: 254591 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.1 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E069C433E1 for ; Thu, 20 Aug 2020 13:01:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 58D4E207BB for ; Thu, 20 Aug 2020 13:01:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="u4kmujXa" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729741AbgHTM6V (ORCPT ); Thu, 20 Aug 2020 08:58:21 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:54186 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729061AbgHTJks (ORCPT ); Thu, 20 Aug 2020 05:40:48 -0400 X-UUID: 1984987cbc4d4ab59f1cffc95a1863c6-20200820 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=PEJq9o5rjHt9Tgt/ghXvLxkCSShvH3PLy1g95tCOzfo=; b=u4kmujXaQXvIQTsiNtWhYp1Ir+63ck6qM6hUbYor08fTrvamxwsGwbRChhAqFPiLrA3xaTpNnbvg32Cg13H6mcCd2Sj711agi0uo1EFrzigGdJdgjUoNngR2Cj32wiXN3MUHrkEPJa3rJEvgTrgPTrBkHmKmq51H/c4Z4ZEzPE0=; X-UUID: 1984987cbc4d4ab59f1cffc95a1863c6-20200820 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1248855608; Thu, 20 Aug 2020 17:40:43 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 20 Aug 2020 17:40:39 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 20 Aug 2020 17:40:40 +0800 From: To: CC: , , , , , Light Hsieh Subject: [PATCH v1 1/1] pinctrl: mediatek: refine mtk_pmx_get_funcs_cnt() Date: Thu, 20 Aug 2020 17:40:39 +0800 Message-ID: <1597916439-26376-1-git-send-email-light.hsieh@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty MIME-Version: 1.0 X-TM-SNTS-SMTP: 89E841128ED7E0737F0C5C3B513376298F38FFC82A08151051B83A73D1B33ED22000:8 X-MTK: N Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Light Hsieh Refine implementation of mtk_pmx_get_funcs_cnt(). The original implementation always return ARRAY_SIZE(mtk_gpio_functions) which is 16. However, MT6765/MT6779 only support 8 functions per GPIO pin. So returning 16 is improper. The new implementation check member nfuncs of struct mtk_pin_soc for a platform. If nfuncs is not zero, return nfuncs. If nfuncs is zero, fallback to original implementation by returning ARRAY_SIZE(mtk_gpio_functions). Signed-off-by: Light Hsieh --- drivers/pinctrl/mediatek/pinctrl-mt6765.c | 1 + drivers/pinctrl/mediatek/pinctrl-mt6779.c | 1 + drivers/pinctrl/mediatek/pinctrl-paris.c | 4 ++++ 3 files changed, 6 insertions(+) -- 1.8.1.1.dirty diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6765.c b/drivers/pinctrl/mediatek/pinctrl-mt6765.c index 2c59d39..8d9f3ea 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt6765.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt6765.c @@ -1069,6 +1069,7 @@ .pins = mtk_pins_mt6765, .npins = ARRAY_SIZE(mtk_pins_mt6765), .ngrps = ARRAY_SIZE(mtk_pins_mt6765), + .nfuncs = 8, .eint_hw = &mt6765_eint_hw, .gpio_m = 0, .base_names = mt6765_pinctrl_register_base_names, diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6779.c b/drivers/pinctrl/mediatek/pinctrl-mt6779.c index bb0851c..1f26adb 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt6779.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt6779.c @@ -744,6 +744,7 @@ .pins = mtk_pins_mt6779, .npins = ARRAY_SIZE(mtk_pins_mt6779), .ngrps = ARRAY_SIZE(mtk_pins_mt6779), + .nfuncs = 8, .eint_hw = &mt6779_eint_hw, .gpio_m = 0, .ies_present = true, diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c b/drivers/pinctrl/mediatek/pinctrl-paris.c index a23c182..96f9f86 100644 --- a/drivers/pinctrl/mediatek/pinctrl-paris.c +++ b/drivers/pinctrl/mediatek/pinctrl-paris.c @@ -657,6 +657,10 @@ static void mtk_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, static int mtk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev) { + struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); + + if (hw->soc->nfuncs) + return (int)hw->soc->nfuncs; return ARRAY_SIZE(mtk_gpio_functions); }