diff mbox series

[071/100] ccs-pll: Add sanity checks

Message ID	20200930152858.8471-72-sakari.ailus@linux.intel.com
State	Superseded
Headers	show Return-Path: <SRS0=fdi2=DH=vger.kernel.org=linux-media-owner@kernel.org> From: Sakari Ailus <sakari.ailus@linux.intel.com> To: linux-media@vger.kernel.org Subject: [PATCH 071/100] ccs-pll: Add sanity checks Date: Wed, 30 Sep 2020 18:28:29 +0300 Message-Id: <20200930152858.8471-72-sakari.ailus@linux.intel.com> In-Reply-To: <20200930152858.8471-1-sakari.ailus@linux.intel.com> References: <20200930152858.8471-1-sakari.ailus@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	CCS driver \| expand [000/100] CCS driver [004/100] smiapp: Remove macros for defining registers, merge definitions [005/100] smiapp: Add macros for accessing CCS registers [006/100] smiapp: Use MIPI CCS version and manufacturer ID information [010/100] smiapp: Use CCS limits in reading data format descriptors [011/100] smiapp: Use CCS limits in reading binning capabilities [013/100] smiapp: Remove quirk function for writing a single 8-bit register [014/100] smiapp: Rename register access functions [018/100] ccs: Remove profile concept [021/100] dt-bindings: nokia,smia: Fix link-frequencies documentation [022/100] dt-bindings: nokia,smia: Make vana-supply optional [023/100] dt-bindings: nokia,smia: Convert to YAML [027/100] ccs: Request for "reset" GPIO [029/100] ccs: Remove the I²C ID table [030/100] ccs: Remove remaining support for platform data [032/100] ccs: Add CCS static data parser library [034/100] ccs: Read CCS static data from firmware binaries [036/100] ccs: The functions to get compose or crop rectangle never return NULL [038/100] ccs: Refactor register reading a little [040/100] ccs: Move limit value real to integer conversion from read to access time [042/100] smiapp-pll: Rename as ccs-pll [044/100] ccs: Add support for manufacturer regs from sensor and module files [045/100] ccs: Use static data read-only registers [046/100] ccs: Clean up runtime PM usage [047/100] ccs: Wrap long lines, unwrap short ones [050/100] ccs-pll: Don't use div_u64 to divide a 32-bit number [051/100] ccs-pll: Split limits and PLL configuration into front and back parts [055/100] ccs-pll: Differentiate between CSI-2 D-PHY and C-PHY [057/100] ccs-pll: Document the structs in the header as well as the function [061/100] ccs-pll: Avoid overflow in pre-PLL divisor lower bound search [063/100] ccs-pll: Fix check for PLL multiplier upper bound [064/100] ccs-pll: Use explicit 32-bit unsigned type [067/100] ccs-pll: Add support for decoupled OP domain calculation [068/100] ccs-pll: Add support for extended input PLL clock divider [071/100] ccs-pll: Add sanity checks [072/100] ccs-pll: Add C-PHY support [076/100] ccs-pll: Print relevant information on PLL tree [077/100] ccs-pll: Rework bounds checks [078/100] ccs-pll: Make VT divisors 16-bit [079/100] ccs-pll: Fix VT post-PLL divisor calculation [080/100] ccs-pll: Separate VT divisor limit calculation from the rest [082/100] ccs: Dual PLL support [083/100] ccs-pll: Add support for DDR OP system and pixel clocks [088/100] ccs: Add digital gain support [091/100] ccs: Only add analogue gain control if the device supports it [094/100] ccs: Add support for analogue gain coefficient controls [095/100] v4l: uapi: Add controls for CCS alternative analogue gain [096/100] ccs: Add support for alternate analogue global gain [097/100] ccs: Add debug prints for MSR registers [100/100] smiapp: Add CCS ACPI device ID

Commit Message

Sakari Ailus Sept. 30, 2020, 3:28 p.m. UTC

Add sanity checks for fields that could cause division by zero.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
---
 drivers/media/i2c/ccs-pll.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff mbox series

Patch

diff --git a/drivers/media/i2c/ccs-pll.c b/drivers/media/i2c/ccs-pll.c
index 84f1735b8df5..1a4fccfc1158 100644
--- a/drivers/media/i2c/ccs-pll.c
+++ b/drivers/media/i2c/ccs-pll.c
@@ -421,6 +421,15 @@  int ccs_pll_calculate(struct device *dev, const struct ccs_pll_limits *lim,
 		pll->vt_lanes = 1;
 	}
 
+	if (!pll->op_lanes || !pll->vt_lanes || !pll->bits_per_pixel ||
+	    !pll->ext_clk_freq_hz || !pll->link_freq || !pll->scale_m ||
+	    !op_lim_fr->min_pll_ip_clk_freq_hz ||
+	    !op_lim_fr->max_pll_ip_clk_freq_hz ||
+	    !op_lim_fr->min_pll_op_clk_freq_hz ||
+	    !op_lim_fr->max_pll_op_clk_freq_hz ||
+	    !op_lim_bk->max_sys_clk_div || !op_lim_fr->max_pll_multiplier)
+		return -EINVAL;
+
 	/*
 	 * Make sure op_pix_clk_div will be integer --- unless flexible
 	 * op_pix_clk_div is supported