| Message ID | 1394134385-1727-21-git-send-email-peter.maydell@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
On 6 March 2014 19:33, Peter Maydell <peter.maydell@linaro.org> wrote: > Add Cortex-A57 processor. > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> > +static void aarch64_a57_initfn(Object *obj) > +{ > + ARMCPU *cpu = ARM_CPU(obj); > + > + set_feature(&cpu->env, ARM_FEATURE_V8); > + set_feature(&cpu->env, ARM_FEATURE_VFP4); > + set_feature(&cpu->env, ARM_FEATURE_VFP_FP16); > + set_feature(&cpu->env, ARM_FEATURE_NEON); > + set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); This last one should be removed, since Thumb2EE is not present in ARMv8. thanks -- PMM
On Thu, Mar 6, 2014 at 1:33 PM, Peter Maydell <peter.maydell@linaro.org> wrote: > Add Cortex-A57 processor. > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> > --- > target-arm/cpu64.c | 43 +++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 43 insertions(+) > > diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c > index d4fb1de..cbdf7ed 100644 > --- a/target-arm/cpu64.c > +++ b/target-arm/cpu64.c > @@ -32,6 +32,48 @@ static inline void set_feature(CPUARMState *env, int feature) > env->features |= 1ULL << feature; > } > > +static void aarch64_a57_initfn(Object *obj) > +{ > + ARMCPU *cpu = ARM_CPU(obj); > + > + set_feature(&cpu->env, ARM_FEATURE_V8); > + set_feature(&cpu->env, ARM_FEATURE_VFP4); > + set_feature(&cpu->env, ARM_FEATURE_VFP_FP16); > + set_feature(&cpu->env, ARM_FEATURE_NEON); > + set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); > + set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); > + set_feature(&cpu->env, ARM_FEATURE_AARCH64); > + cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A57; > + cpu->midr = 0x411fd070; > + cpu->reset_fpsid = 0x41034070; > + cpu->mvfr0 = 0x10110222; > + cpu->mvfr1 = 0x12111111; > + cpu->ctr = 0x8444c004; > + cpu->reset_sctlr = 0x00c50838; > + cpu->id_pfr0 = 0x00000131; > + cpu->id_pfr1 = 0x00011011; > + cpu->id_dfr0 = 0x03010066; > + cpu->id_afr0 = 0x00000000; > + cpu->id_mmfr0 = 0x10101105; > + cpu->id_mmfr1 = 0x40000000; > + cpu->id_mmfr2 = 0x01260000; > + cpu->id_mmfr3 = 0x02102211; > + cpu->id_isar0 = 0x02101110; > + cpu->id_isar1 = 0x13112111; > + cpu->id_isar2 = 0x21232042; > + cpu->id_isar3 = 0x01112131; > + cpu->id_isar4 = 0x00011142; Need to add id_isar5 here. 0x00010001 is the correct value with no crypto extensions. Rob
diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c index d4fb1de..cbdf7ed 100644 --- a/target-arm/cpu64.c +++ b/target-arm/cpu64.c @@ -32,6 +32,48 @@ static inline void set_feature(CPUARMState *env, int feature) env->features |= 1ULL << feature; } +static void aarch64_a57_initfn(Object *obj) +{ + ARMCPU *cpu = ARM_CPU(obj); + + set_feature(&cpu->env, ARM_FEATURE_V8); + set_feature(&cpu->env, ARM_FEATURE_VFP4); + set_feature(&cpu->env, ARM_FEATURE_VFP_FP16); + set_feature(&cpu->env, ARM_FEATURE_NEON); + set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); + set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); + set_feature(&cpu->env, ARM_FEATURE_AARCH64); + cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A57; + cpu->midr = 0x411fd070; + cpu->reset_fpsid = 0x41034070; + cpu->mvfr0 = 0x10110222; + cpu->mvfr1 = 0x12111111; + cpu->ctr = 0x8444c004; + cpu->reset_sctlr = 0x00c50838; + cpu->id_pfr0 = 0x00000131; + cpu->id_pfr1 = 0x00011011; + cpu->id_dfr0 = 0x03010066; + cpu->id_afr0 = 0x00000000; + cpu->id_mmfr0 = 0x10101105; + cpu->id_mmfr1 = 0x40000000; + cpu->id_mmfr2 = 0x01260000; + cpu->id_mmfr3 = 0x02102211; + cpu->id_isar0 = 0x02101110; + cpu->id_isar1 = 0x13112111; + cpu->id_isar2 = 0x21232042; + cpu->id_isar3 = 0x01112131; + cpu->id_isar4 = 0x00011142; + cpu->id_aa64pfr0 = 0x00002222; + cpu->id_aa64dfr0 = 0x10305106; + cpu->id_aa64isar0 = 0x00010000; + cpu->id_aa64mmfr0 = 0x00001124; + cpu->clidr = 0x0a200023; + cpu->ccsidr[0] = 0x701fe00a; /* 32KB L1 dcache */ + cpu->ccsidr[1] = 0x201fe012; /* 48KB L1 icache */ + cpu->ccsidr[2] = 0x70ffe07a; /* 2048KB L2 cache */ + cpu->dcz_blocksize = 4; /* 64 bytes */ +} + #ifdef CONFIG_USER_ONLY static void aarch64_any_initfn(Object *obj) { @@ -57,6 +99,7 @@ typedef struct ARMCPUInfo { } ARMCPUInfo; static const ARMCPUInfo aarch64_cpus[] = { + { .name = "cortex-a57", .initfn = aarch64_a57_initfn }, #ifdef CONFIG_USER_ONLY { .name = "any", .initfn = aarch64_any_initfn }, #endif
Add Cortex-A57 processor. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target-arm/cpu64.c | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+)