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[mlx5-next,1/3] RDMA/mlx5: Add sw_owner_v2 bit capability

Message ID 20200903073857.1129166-2-leon@kernel.org
State New
Headers show
Series [mlx5-next,1/3] RDMA/mlx5: Add sw_owner_v2 bit capability | expand

Commit Message

Leon Romanovsky Sept. 3, 2020, 7:38 a.m. UTC
From: Alex Vesker <valex@nvidia.com>

Added sw_owner_v2 which will be enabled for future devices,
replacing sw_owner bit.

Signed-off-by: Alex Vesker <valex@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
---
 include/linux/mlx5/mlx5_ifc.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

--
2.26.2
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Patch

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index aee25e4fb2cc..651591a2965d 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -420,7 +420,8 @@  struct mlx5_ifc_flow_table_prop_layout_bits {
 	u8         reserved_at_1a[0x2];
 	u8         ipsec_encrypt[0x1];
 	u8         ipsec_decrypt[0x1];
-	u8         reserved_at_1e[0x2];
+	u8         sw_owner_v2[0x1];
+	u8         reserved_at_1f[0x1];

 	u8         termination_table_raw_traffic[0x1];
 	u8         reserved_at_21[0x1];