Message ID | 1394821351-21477-4-git-send-email-robherring2@gmail.com |
---|---|
State | Superseded |
Headers | show |
On 14 March 2014 18:22, Rob Herring <robherring2@gmail.com> wrote: > From: Rob Herring <rob.herring@linaro.org> > > The receive fifo full bit should be set when 1 character is received and > the fifo is disabled or when 16 characters are in the fifo. > > Signed-off-by: Rob Herring <rob.herring@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> thanks -- PMM
diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 920ba3f..5e664f4 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -220,7 +220,7 @@ static void pl011_put_fifo(void *opaque, uint32_t value) s->read_fifo[slot] = value; s->read_count++; s->flags &= ~PL011_FLAG_RXFE; - if (s->cr & 0x10 || s->read_count == 16) { + if (!(s->lcr & 0x10) || s->read_count == 16) { s->flags |= PL011_FLAG_RXFF; } if (s->read_count == s->read_trigger) {