diff mbox

[Xen-devel,v4,01/10] xen/arm: no need to set HCR_VI when using the vgic to inject irqs

Message ID 1395232325-19226-1-git-send-email-stefano.stabellini@eu.citrix.com
State New
Headers show

Commit Message

Stefano Stabellini March 19, 2014, 12:31 p.m. UTC
HCR_VI forces the guest to resume execution in IRQ mode and can actually
cause spurious interrupt injections.
The GIC is capable of injecting interrupts into the guest and causing it
to switch to IRQ mode automatically, without any need for the hypervisor
to set HCR_VI manually.

Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>

---

Changes in v4:
- improve commit message.
---
 xen/arch/arm/gic.c |   20 --------------------
 1 file changed, 20 deletions(-)

Comments

Julien Grall March 19, 2014, 1:33 p.m. UTC | #1
On 03/19/2014 12:31 PM, Stefano Stabellini wrote:
> HCR_VI forces the guest to resume execution in IRQ mode and can actually
> cause spurious interrupt injections.
> The GIC is capable of injecting interrupts into the guest and causing it
> to switch to IRQ mode automatically, without any need for the hypervisor
> to set HCR_VI manually.
> 
> Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
Ian Campbell March 21, 2014, 2:06 p.m. UTC | #2
On Wed, 2014-03-19 at 12:31 +0000, Stefano Stabellini wrote:
> HCR_VI forces the guest to resume execution in IRQ mode and can actually
> cause spurious interrupt injections.
> The GIC is capable of injecting interrupts into the guest and causing it
> to switch to IRQ mode automatically, without any need for the hypervisor
> to set HCR_VI manually.
> 
> Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>

Acked-by: Ian Campbell <ian.campbell@citrix.com>

Do you happen to have a chapter number from the ARM ARM and/or the GIC
spec to confirm what you say here? If so please can you include them.

(did I fail to hit send, I guess so... )
diff mbox

Patch

diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
index 91a2982..b388ef3 100644
--- a/xen/arch/arm/gic.c
+++ b/xen/arch/arm/gic.c
@@ -726,22 +726,6 @@  void gic_clear_pending_irqs(struct vcpu *v)
     spin_unlock_irqrestore(&gic.lock, flags);
 }
 
-static void gic_inject_irq_start(void)
-{
-    register_t hcr = READ_SYSREG(HCR_EL2);
-    WRITE_SYSREG(hcr | HCR_VI, HCR_EL2);
-    isb();
-}
-
-static void gic_inject_irq_stop(void)
-{
-    register_t hcr = READ_SYSREG(HCR_EL2);
-    if (hcr & HCR_VI) {
-        WRITE_SYSREG(hcr & ~HCR_VI, HCR_EL2);
-        isb();
-    }
-}
-
 int gic_events_need_delivery(void)
 {
     return (!list_empty(&current->arch.vgic.lr_pending) ||
@@ -754,10 +738,6 @@  void gic_inject(void)
         vgic_vcpu_inject_irq(current, current->domain->arch.evtchn_irq, 1);
 
     gic_restore_pending_irqs(current);
-    if (!gic_events_need_delivery())
-        gic_inject_irq_stop();
-    else
-        gic_inject_irq_start();
 }
 
 int gic_route_irq_to_guest(struct domain *d, const struct dt_irq *irq,