| Message ID | 1602690377-21304-1-git-send-email-kathirav@codeaurora.org |
|---|---|
| State | Accepted |
| Commit | 4af5c6dc255ca64e5263a5254bb7553f05bb682c |
| Headers | show |
| Series | arm64: dts: ipq6018: update the reserved-memory node | expand |
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 1aa8d8579463..ee7acddcbdfa 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -98,8 +98,8 @@ reserved-memory { #size-cells = <2>; ranges; - tz: tz@48500000 { - reg = <0x0 0x48500000 0x0 0x00200000>; + tz: memory@4a600000 { + reg = <0x0 0x4a600000 0x0 0x00400000>; no-map; }; @@ -109,7 +109,7 @@ smem_region: memory@4aa00000 { }; q6_region: memory@4ab00000 { - reg = <0x0 0x4ab00000 0x0 0x02800000>; + reg = <0x0 0x4ab00000 0x0 0x05500000>; no-map; }; };
Memory region reserved for the TZ is changed long back. Let's update the same to align with the corret region. Its size also increased to 4MB from 2MB. Along with that, bump the Q6 region size to 85MB. Fixes: 1e8277854b49 ("arm64: dts: Add ipq6018 SoC and CP01 board support") Signed-off-by: Kathiravan T <kathirav@codeaurora.org> --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) base-commit: bbf5c979011a099af5dc76498918ed7df445635b