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[71.195.31.37]) by mx.google.com with ESMTPSA id t1sm7139024igw.16.2014.03.28.14.12.42 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 28 Mar 2014 14:12:43 -0700 (PDT) From: Alex Elder To: linux@arm.linux.org.uk, linus.walleij@linaro.org, viresh.linux@gmail.com, shiraz.hashim@gmail.com, catalin.marinas@arm.com Cc: spear-devel@list.st.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 1/7] ARM: allow inclusion from assembly Date: Fri, 28 Mar 2014 16:12:54 -0500 Message-Id: <1396041180-29897-2-git-send-email-elder@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1396041180-29897-1-git-send-email-elder@linaro.org> References: <1396041180-29897-1-git-send-email-elder@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: elder@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.171 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Conditionally exclude some portions of ARM to allow that file to be included from assembly source. Signed-off-by: Alex Elder --- arch/arm/include/asm/cputype.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h index acdde76..a74c671 100644 --- a/arch/arm/include/asm/cputype.h +++ b/arch/arm/include/asm/cputype.h @@ -2,7 +2,9 @@ #define __ASM_ARM_CPUTYPE_H #include +#ifndef __ASSEMBLY__ #include +#endif #define CPUID_ID 0 #define CPUID_CACHETYPE 1 @@ -77,6 +79,7 @@ #define ARM_CPU_XSCALE_ARCH_V2 0x4000 #define ARM_CPU_XSCALE_ARCH_V3 0x6000 +#ifndef __ASSEMBLY__ extern unsigned int processor_id; #ifdef CONFIG_CPU_CP15 @@ -219,5 +222,6 @@ static inline int cpu_is_xsc3(void) #else #define cpu_is_xscale() 1 #endif +#endif /* !__ASSEMBLY__ */ #endif