@@ -256,9 +256,8 @@ static void armsse_init(Object *obj)
g_free(name);
name = g_strdup_printf("armv7m%d", i);
- sysbus_init_child_obj(OBJECT(&s->cluster[i]), name,
- &s->armv7m[i], sizeof(s->armv7m[i]),
- TYPE_ARMV7M);
+ object_initialize_child(OBJECT(&s->cluster[i]), name, &s->armv7m[i],
+ TYPE_ARMV7M);
qdev_prop_set_string(DEVICE(&s->armv7m[i]), "cpu-type",
ARM_CPU_TYPE_NAME("cortex-m33"));
g_free(name);
@@ -308,31 +307,26 @@ static void armsse_init(Object *obj)
object_initialize_child(obj, "armsse-sysinfo", &s->sysinfo,
TYPE_IOTKIT_SYSINFO);
if (info->has_mhus) {
- sysbus_init_child_obj(obj, "mhu0", &s->mhu[0], sizeof(s->mhu[0]),
- TYPE_ARMSSE_MHU);
- sysbus_init_child_obj(obj, "mhu1", &s->mhu[1], sizeof(s->mhu[1]),
- TYPE_ARMSSE_MHU);
+ object_initialize_child(obj, "mhu0", &s->mhu[0], TYPE_ARMSSE_MHU);
+ object_initialize_child(obj, "mhu1", &s->mhu[1], TYPE_ARMSSE_MHU);
}
if (info->has_ppus) {
for (i = 0; i < info->num_cpus; i++) {
char *name = g_strdup_printf("CPU%dCORE_PPU", i);
int ppuidx = CPU0CORE_PPU + i;
- sysbus_init_child_obj(obj, name, &s->ppu[ppuidx],
- sizeof(s->ppu[ppuidx]),
- TYPE_UNIMPLEMENTED_DEVICE);
+ object_initialize_child(obj, name, &s->ppu[ppuidx],
+ TYPE_UNIMPLEMENTED_DEVICE);
g_free(name);
}
- sysbus_init_child_obj(obj, "DBG_PPU", &s->ppu[DBG_PPU],
- sizeof(s->ppu[DBG_PPU]),
- TYPE_UNIMPLEMENTED_DEVICE);
+ object_initialize_child(obj, "DBG_PPU", &s->ppu[DBG_PPU],
+ TYPE_UNIMPLEMENTED_DEVICE);
for (i = 0; i < info->sram_banks; i++) {
char *name = g_strdup_printf("RAM%d_PPU", i);
int ppuidx = RAM0_PPU + i;
- sysbus_init_child_obj(obj, name, &s->ppu[ppuidx],
- sizeof(s->ppu[ppuidx]),
- TYPE_UNIMPLEMENTED_DEVICE);
+ object_initialize_child(obj, name, &s->ppu[ppuidx],
+ TYPE_UNIMPLEMENTED_DEVICE);
g_free(name);
}
}
@@ -428,7 +422,7 @@ static void map_ppu(ARMSSE *s, int ppuidx, const char *name, hwaddr addr)
qdev_prop_set_string(dev, "name", name);
qdev_prop_set_uint64(dev, "size", 0x1000);
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ppu[ppuidx]), 0, addr);
}
@@ -579,7 +573,7 @@ static void armsse_realize(DeviceState *dev, Error **errp)
error_propagate(errp, err);
return;
}
- object_property_set_bool(cpuobj, true, "realized", &err);
+ sysbus_realize(SYS_BUS_DEVICE(cpuobj), &err);
if (err) {
error_propagate(errp, err);
return;
@@ -815,8 +809,7 @@ static void armsse_realize(DeviceState *dev, Error **errp)
int cpunum;
SysBusDevice *mhu_sbd = SYS_BUS_DEVICE(&s->mhu[i]);
- object_property_set_bool(OBJECT(&s->mhu[i]), true,
- "realized", &err);
+ sysbus_realize(SYS_BUS_DEVICE(&s->mhu[i]), &err);
if (err) {
error_propagate(errp, err);
return;
@@ -141,8 +141,8 @@ static void armv7m_instance_init(Object *obj)
OBJECT(&s->nvic), "num-irq");
for (i = 0; i < ARRAY_SIZE(s->bitband); i++) {
- sysbus_init_child_obj(obj, "bitband[*]", &s->bitband[i],
- sizeof(s->bitband[i]), TYPE_BITBAND);
+ object_initialize_child(obj, "bitband[*]", &s->bitband[i],
+ TYPE_BITBAND);
}
}
@@ -257,7 +257,7 @@ static void armv7m_realize(DeviceState *dev, Error **errp)
}
object_property_set_link(obj, OBJECT(s->board_memory),
"source-memory", &error_abort);
- object_property_set_bool(obj, true, "realized", &err);
+ sysbus_realize(SYS_BUS_DEVICE(obj), &err);
if (err != NULL) {
error_propagate(errp, err);
return;
@@ -39,21 +39,21 @@ static void microbit_init(MachineState *machine)
Object *soc = OBJECT(&s->nrf51);
Object *i2c = OBJECT(&s->i2c);
- sysbus_init_child_obj(OBJECT(machine), "nrf51", &s->nrf51, sizeof(s->nrf51),
- TYPE_NRF51_SOC);
+ object_initialize_child(OBJECT(machine), "nrf51", &s->nrf51,
+ TYPE_NRF51_SOC);
qdev_prop_set_chr(DEVICE(&s->nrf51), "serial0", serial_hd(0));
object_property_set_link(soc, OBJECT(system_memory), "memory",
&error_fatal);
- object_property_set_bool(soc, true, "realized", &error_fatal);
+ sysbus_realize(SYS_BUS_DEVICE(soc), &error_fatal);
/*
* Overlap the TWI stub device into the SoC. This is a microbit-specific
* hack until we implement the nRF51 TWI controller properly and the
* magnetometer/accelerometer devices.
*/
- sysbus_init_child_obj(OBJECT(machine), "microbit.twi", &s->i2c,
- sizeof(s->i2c), TYPE_MICROBIT_I2C);
- object_property_set_bool(i2c, true, "realized", &error_fatal);
+ object_initialize_child(OBJECT(machine), "microbit.twi", &s->i2c,
+ TYPE_MICROBIT_I2C);
+ sysbus_realize(SYS_BUS_DEVICE(i2c), &error_fatal);
mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(i2c), 0);
memory_region_add_subregion_overlap(&s->nrf51.container, NRF51_TWI_BASE,
mr, -1);
@@ -238,10 +238,10 @@ static void versal_create_rtc(Versal *s, qemu_irq *pic)
SysBusDevice *sbd;
MemoryRegion *mr;
- sysbus_init_child_obj(OBJECT(s), "rtc", &s->pmc.rtc, sizeof(s->pmc.rtc),
- TYPE_XLNX_ZYNQMP_RTC);
+ object_initialize_child(OBJECT(s), "rtc", &s->pmc.rtc,
+ TYPE_XLNX_ZYNQMP_RTC);
sbd = SYS_BUS_DEVICE(&s->pmc.rtc);
- qdev_init_nofail(DEVICE(sbd));
+ sysbus_realize(SYS_BUS_DEVICE(sbd), &error_fatal);
mr = sysbus_mmio_get_region(sbd, 0);
memory_region_add_subregion(&s->mr_ps, MM_PMC_RTC, mr);
@@ -251,8 +251,8 @@ static void xlnx_zynqmp_init(Object *obj)
object_initialize_child(obj, "sata", &s->sata, TYPE_SYSBUS_AHCI);
for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
- sysbus_init_child_obj(obj, "sdhci[*]", &s->sdhci[i],
- sizeof(s->sdhci[i]), TYPE_SYSBUS_SDHCI);
+ object_initialize_child(obj, "sdhci[*]", &s->sdhci[i],
+ TYPE_SYSBUS_SDHCI);
}
for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
@@ -530,7 +530,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
error_propagate(errp, err);
return;
}
- object_property_set_bool(sdhci, true, "realized", &err);
+ sysbus_realize(SYS_BUS_DEVICE(sdhci), &err);
if (err) {
error_propagate(errp, err);
return;
@@ -81,7 +81,7 @@ static void realview_mpcore_realize(DeviceState *dev, Error **errp)
}
/* ??? IRQ routing is hardcoded to "normal" mode. */
for (n = 0; n < 4; n++) {
- object_property_set_bool(OBJECT(&s->gic[n]), true, "realized", &err);
+ sysbus_realize(SYS_BUS_DEVICE(&s->gic[n]), &err);
if (err != NULL) {
error_propagate(errp, err);
return;
@@ -109,8 +109,7 @@ static void mpcore_rirq_init(Object *obj)
sysbus_init_mmio(sbd, sysbus_mmio_get_region(privbusdev, 0));
for (i = 0; i < 4; i++) {
- sysbus_init_child_obj(obj, "gic[*]", &s->gic[i], sizeof(s->gic[i]),
- TYPE_REALVIEW_GIC);
+ object_initialize_child(obj, "gic[*]", &s->gic[i], TYPE_REALVIEW_GIC);
}
}
@@ -1977,7 +1977,7 @@ static void sm501_realize_sysbus(DeviceState *dev, Error **errp)
sysbus_pass_irq(sbd, SYS_BUS_DEVICE(usb_dev));
/* bridge to serial emulation module */
- qdev_init_nofail(DEVICE(&s->serial));
+ sysbus_realize(SYS_BUS_DEVICE(&s->serial), &error_fatal);
mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->serial), 0);
memory_region_add_subregion(&s->state.mmio_region, SM501_UART0, mr);
/* TODO : chain irq to IRL */
@@ -2023,7 +2023,7 @@ static void sm501_sysbus_init(Object *o)
SM501SysBusState *sm501 = SYSBUS_SM501(o);
SerialMM *smm = &sm501->serial;
- sysbus_init_child_obj(o, "serial", smm, sizeof(*smm), TYPE_SERIAL_MM);
+ object_initialize_child(o, "serial", smm, TYPE_SERIAL_MM);
qdev_set_legacy_instance_id(DEVICE(smm), SM501_UART0, 2);
qdev_prop_set_uint8(DEVICE(smm), "regshift", 2);
qdev_prop_set_uint8(DEVICE(smm), "endianness", DEVICE_LITTLE_ENDIAN);
@@ -2640,8 +2640,7 @@ static void armv7m_nvic_realize(DeviceState *dev, Error **errp)
s->num_prio_bits = arm_feature(&s->cpu->env, ARM_FEATURE_V7) ? 8 : 2;
- object_property_set_bool(OBJECT(&s->systick[M_REG_NS]), true,
- "realized", &err);
+ sysbus_realize(SYS_BUS_DEVICE(&s->systick[M_REG_NS]), &err);
if (err != NULL) {
error_propagate(errp, err);
return;
@@ -2735,8 +2734,8 @@ static void armv7m_nvic_instance_init(Object *obj)
NVICState *nvic = NVIC(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
- sysbus_init_child_obj(obj, "systick-reg-ns", &nvic->systick[M_REG_NS],
- sizeof(nvic->systick[M_REG_NS]), TYPE_SYSTICK);
+ object_initialize_child(obj, "systick-reg-ns", &nvic->systick[M_REG_NS],
+ TYPE_SYSTICK);
/* We can't initialize the secure systick here, as we don't know
* yet if we need it.
*/