| Message ID | 20200927082304.9232-1-yangbo.lu@nxp.com |
|---|---|
| State | New |
| Headers | show |
| Series | mmc: sdhci-of-esdhc: fix reference clock source selection | expand |
On Sun, 27 Sep 2020 at 10:31, Yangbo Lu <yangbo.lu@nxp.com> wrote: > > The bit ESDHC_PERIPHERAL_CLK_SEL to select using peripheral clock > or platform clock is not able to be reset by SDHCI_RESET_ALL. > So driver needs to initialize it as 1 or 0 once, to override the > different value which may be configured in bootloader. > > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Applied for next, thanks! Kind regards Uffe > --- > drivers/mmc/host/sdhci-of-esdhc.c | 18 ++++++++++++------ > 1 file changed, 12 insertions(+), 6 deletions(-) > > diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c > index 3a3340c..0b45eff 100644 > --- a/drivers/mmc/host/sdhci-of-esdhc.c > +++ b/drivers/mmc/host/sdhci-of-esdhc.c > @@ -1360,13 +1360,19 @@ static void esdhc_init(struct platform_device *pdev, struct sdhci_host *host) > clk_put(clk); > } > > - if (esdhc->peripheral_clock) { > - esdhc_clock_enable(host, false); > - val = sdhci_readl(host, ESDHC_DMA_SYSCTL); > + esdhc_clock_enable(host, false); > + val = sdhci_readl(host, ESDHC_DMA_SYSCTL); > + /* > + * This bit is not able to be reset by SDHCI_RESET_ALL. Need to > + * initialize it as 1 or 0 once, to override the different value > + * which may be configured in bootloader. > + */ > + if (esdhc->peripheral_clock) > val |= ESDHC_PERIPHERAL_CLK_SEL; > - sdhci_writel(host, val, ESDHC_DMA_SYSCTL); > - esdhc_clock_enable(host, true); > - } > + else > + val &= ~ESDHC_PERIPHERAL_CLK_SEL; > + sdhci_writel(host, val, ESDHC_DMA_SYSCTL); > + esdhc_clock_enable(host, true); > } > > static int esdhc_hs400_prepare_ddr(struct mmc_host *mmc) > -- > 2.7.4 >
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c index 3a3340c..0b45eff 100644 --- a/drivers/mmc/host/sdhci-of-esdhc.c +++ b/drivers/mmc/host/sdhci-of-esdhc.c @@ -1360,13 +1360,19 @@ static void esdhc_init(struct platform_device *pdev, struct sdhci_host *host) clk_put(clk); } - if (esdhc->peripheral_clock) { - esdhc_clock_enable(host, false); - val = sdhci_readl(host, ESDHC_DMA_SYSCTL); + esdhc_clock_enable(host, false); + val = sdhci_readl(host, ESDHC_DMA_SYSCTL); + /* + * This bit is not able to be reset by SDHCI_RESET_ALL. Need to + * initialize it as 1 or 0 once, to override the different value + * which may be configured in bootloader. + */ + if (esdhc->peripheral_clock) val |= ESDHC_PERIPHERAL_CLK_SEL; - sdhci_writel(host, val, ESDHC_DMA_SYSCTL); - esdhc_clock_enable(host, true); - } + else + val &= ~ESDHC_PERIPHERAL_CLK_SEL; + sdhci_writel(host, val, ESDHC_DMA_SYSCTL); + esdhc_clock_enable(host, true); } static int esdhc_hs400_prepare_ddr(struct mmc_host *mmc)
The bit ESDHC_PERIPHERAL_CLK_SEL to select using peripheral clock or platform clock is not able to be reset by SDHCI_RESET_ALL. So driver needs to initialize it as 1 or 0 once, to override the different value which may be configured in bootloader. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> --- drivers/mmc/host/sdhci-of-esdhc.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-)