diff mbox

[v2,3/5] disas/libvixl: Add missing ULL suffixes

Message ID 1398697344-24080-4-git-send-email-peter.maydell@linaro.org
State Superseded
Headers show

Commit Message

Peter Maydell April 28, 2014, 3:02 p.m. UTC 
Upstream libvixl 1.3 fixes a number of the places which needed
ULL suffixes, but not all of them; reapply those ones from
commit 37fd5b53b which are still relevant.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 disas/libvixl/a64/instructions-a64.h | 24 ++++++++++++------------
 disas/libvixl/utils.h                |  4 ++--
 2 files changed, 14 insertions(+), 14 deletions(-)

Comments

Alex Bennée April 28, 2014, 3:27 p.m. UTC | #1 
Peter Maydell <peter.maydell@linaro.org> writes:

> Upstream libvixl 1.3 fixes a number of the places which needed
> ULL suffixes, but not all of them; reapply those ones from
> commit 37fd5b53b which are still relevant.

Any idea why they didn't apply them all?
Peter Maydell April 28, 2014, 3:28 p.m. UTC | #2 
On 28 April 2014 16:27, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> Peter Maydell <peter.maydell@linaro.org> writes:
>
>> Upstream libvixl 1.3 fixes a number of the places which needed
>> ULL suffixes, but not all of them; reapply those ones from
>> commit 37fd5b53b which are still relevant.
>
> Any idea why they didn't apply them all?

Accidentally missed, that's all -- some of these warnings
only happen with obscure platforms like the mingw 32 bit
compiler. The remainder of the fixes will probably get
into either the next or next-but-one release, depending
on timing.

thanks
-- PMM
diff mbox

Patch

diff --git a/disas/libvixl/a64/instructions-a64.h b/disas/libvixl/a64/instructions-a64.h
index 4eaee58..d7b09e2 100644
--- a/disas/libvixl/a64/instructions-a64.h
+++ b/disas/libvixl/a64/instructions-a64.h
@@ -58,20 +58,20 @@  const unsigned kDRegSizeLog2 = 6;
 const unsigned kDRegSizeInBytes = kDRegSize / 8;
 const unsigned kDRegSizeInBytesLog2 = kDRegSizeLog2 - 3;
 const uint64_t kWRegMask = 0xffffffff;
-const uint64_t kXRegMask = 0xffffffffffffffff;
+const uint64_t kXRegMask = 0xffffffffffffffffULL;
 const uint64_t kSRegMask = 0xffffffff;
-const uint64_t kDRegMask = 0xffffffffffffffff;
+const uint64_t kDRegMask = 0xffffffffffffffffULL;
 const uint64_t kSSignMask = 0x80000000;
-const uint64_t kDSignMask = 0x8000000000000000;
+const uint64_t kDSignMask = 0x8000000000000000ULL;
 const uint64_t kWSignMask = 0x80000000;
-const uint64_t kXSignMask = 0x8000000000000000;
+const uint64_t kXSignMask = 0x8000000000000000ULL;
 const uint64_t kByteMask = 0xff;
 const uint64_t kHalfWordMask = 0xffff;
 const uint64_t kWordMask = 0xffffffff;
-const uint64_t kXMaxUInt = 0xffffffffffffffff;
+const uint64_t kXMaxUInt = 0xffffffffffffffffULL;
 const uint64_t kWMaxUInt = 0xffffffff;
-const int64_t kXMaxInt = 0x7fffffffffffffff;
-const int64_t kXMinInt = 0x8000000000000000;
+const int64_t kXMaxInt = 0x7fffffffffffffffULL;
+const int64_t kXMinInt = 0x8000000000000000ULL;
 const int32_t kWMaxInt = 0x7fffffff;
 const int32_t kWMinInt = 0x80000000;
 const unsigned kLinkRegCode = 30;
@@ -87,20 +87,20 @@  const unsigned kFloatExponentBits = 8;
 
 const float kFP32PositiveInfinity = rawbits_to_float(0x7f800000);
 const float kFP32NegativeInfinity = rawbits_to_float(0xff800000);
-const double kFP64PositiveInfinity = rawbits_to_double(0x7ff0000000000000);
-const double kFP64NegativeInfinity = rawbits_to_double(0xfff0000000000000);
+const double kFP64PositiveInfinity = rawbits_to_double(0x7ff0000000000000ULL);
+const double kFP64NegativeInfinity = rawbits_to_double(0xfff0000000000000ULL);
 
 // This value is a signalling NaN as both a double and as a float (taking the
 // least-significant word).
-static const double kFP64SignallingNaN = rawbits_to_double(0x7ff000007f800001);
+static const double kFP64SignallingNaN = rawbits_to_double(0x7ff000007f800001ULL);
 static const float kFP32SignallingNaN = rawbits_to_float(0x7f800001);
 
 // A similar value, but as a quiet NaN.
-static const double kFP64QuietNaN = rawbits_to_double(0x7ff800007fc00001);
+static const double kFP64QuietNaN = rawbits_to_double(0x7ff800007fc00001ULL);
 static const float kFP32QuietNaN = rawbits_to_float(0x7fc00001);
 
 // The default NaN values (for FPCR.DN=1).
-static const double kFP64DefaultNaN = rawbits_to_double(0x7ff8000000000000);
+static const double kFP64DefaultNaN = rawbits_to_double(0x7ff8000000000000ULL);
 static const float kFP32DefaultNaN = rawbits_to_float(0x7fc00000);
 
 
diff --git a/disas/libvixl/utils.h b/disas/libvixl/utils.h
index bed70c6..34fb50e 100644
--- a/disas/libvixl/utils.h
+++ b/disas/libvixl/utils.h
@@ -99,7 +99,7 @@  double rawbits_to_double(uint64_t bits);
 
 // NaN tests.
 inline bool IsSignallingNaN(double num) {
-  const uint64_t kFP64QuietNaNMask = 0x0008000000000000;
+  const uint64_t kFP64QuietNaNMask = 0x0008000000000000ULL;
   uint64_t raw = double_to_rawbits(num);
   if (isnan(num) && ((raw & kFP64QuietNaNMask) == 0)) {
     return true;
@@ -126,7 +126,7 @@  inline bool IsQuietNaN(T num) {
 
 // Convert the NaN in 'num' to a quiet NaN.
 inline double ToQuietNaN(double num) {
-  const uint64_t kFP64QuietNaNMask = 0x0008000000000000;
+  const uint64_t kFP64QuietNaNMask = 0x0008000000000000ULL;
   VIXL_ASSERT(isnan(num));
   return rawbits_to_double(double_to_rawbits(num) | kFP64QuietNaNMask);
 }