diff mbox

[v5,4/4] ARM: dts: dra7: add OCP2SCP3 and SATA nodes

Message ID 536A2002.4020603@ti.com
State New
Headers show

Commit Message

Roger Quadros May 7, 2014, 11:58 a.m. UTC 
From: Balaji T K <balajitk@ti.com>

Add nodes for OCP2SCP3 bus, SATA controller and SATA PHY.

[Roger Q] Clean up. Updated IRQ for interrupt crossbar.

CC: Benoit Cousson <bcousson@baylibre.com>
Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/dra7.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

Comments

Tony Lindgren May 14, 2014, 9:18 p.m. UTC | #1 
* Roger Quadros <rogerq@ti.com> [140507 04:59]:
> From: Balaji T K <balajitk@ti.com>
> 
> Add nodes for OCP2SCP3 bus, SATA controller and SATA PHY.
> 
> [Roger Q] Clean up. Updated IRQ for interrupt crossbar.

Adding this too into omap-for-v3.16/dt.

Regards,

Tony
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diff mbox

Patch

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index cec826f..1f42e72 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -798,6 +798,45 @@ 
 			dma-names = "tx0", "rx0";
 			status = "disabled";
 		};
+
+		omap_control_sata: control-phy@4a002374 {
+			compatible = "ti,control-phy-pipe3";
+			reg = <0x4a002374 0x4>;
+			reg-names = "power";
+			clocks = <&sys_clkin1>;
+			clock-names = "sysclk";
+		};
+
+		/* OCP2SCP3 */
+		ocp2scp@4a090000 {
+			compatible = "ti,omap-ocp2scp";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+			reg = <0x4a090000 0x20>;
+			ti,hwmods = "ocp2scp3";
+			sata_phy: phy@4A096000 {
+				compatible = "ti,phy-pipe3-sata";
+				reg = <0x4A096000 0x80>, /* phy_rx */
+				      <0x4A096400 0x64>, /* phy_tx */
+				      <0x4A096800 0x40>; /* pll_ctrl */
+				reg-names = "phy_rx", "phy_tx", "pll_ctrl";
+				ctrl-module = <&omap_control_sata>;
+				clocks = <&sys_clkin1>;
+				clock-names = "sysclk";
+				#phy-cells = <0>;
+			};
+		};
+
+		sata: sata@4a141100 {
+			compatible = "snps,dwc-ahci";
+			reg = <0x4a140000 0x1100>, <0x4a141100 0x7>;
+			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+			phys = <&sata_phy>;
+			phy-names = "sata-phy";
+			clocks = <&sata_ref_clk>;
+			ti,hwmods = "sata";
+		};
 	};
 
 	crossbar_mpu: crossbar@4a020000 {