@@ -559,7 +559,7 @@ static inline void gic_set_lr(int lr, struct pending_irq *p,
GICH[GICH_LR + lr] = lr_val;
set_bit(GIC_IRQ_GUEST_VISIBLE, &p->status);
- clear_bit(GIC_IRQ_GUEST_PENDING, &p->status);
+ clear_bit(GIC_IRQ_GUEST_QUEUED, &p->status);
p->lr = lr;
}
@@ -637,7 +637,7 @@ static void gic_update_one_lr(struct vcpu *v, int i)
p->desc->status &= ~IRQ_INPROGRESS;
clear_bit(GIC_IRQ_GUEST_VISIBLE, &p->status);
p->lr = GIC_INVALID_LR;
- if ( test_bit(GIC_IRQ_GUEST_PENDING, &p->status) &&
+ if ( test_bit(GIC_IRQ_GUEST_QUEUED, &p->status) &&
test_bit(GIC_IRQ_GUEST_ENABLED, &p->status))
gic_raise_guest_irq(v, irq, p->priority);
else
@@ -719,7 +719,7 @@ void vgic_vcpu_inject_irq(struct vcpu *v, unsigned int irq)
{
if ( (irq != current->domain->arch.evtchn_irq) ||
(!test_bit(GIC_IRQ_GUEST_VISIBLE, &n->status)) )
- set_bit(GIC_IRQ_GUEST_PENDING, &n->status);
+ set_bit(GIC_IRQ_GUEST_QUEUED, &n->status);
goto out;
}
@@ -733,7 +733,7 @@ void vgic_vcpu_inject_irq(struct vcpu *v, unsigned int irq)
priority = byte_read(rank->ipriority[REG_RANK_INDEX(8, idx)], 0, byte);
n->irq = irq;
- set_bit(GIC_IRQ_GUEST_PENDING, &n->status);
+ set_bit(GIC_IRQ_GUEST_QUEUED, &n->status);
n->priority = priority;
/* the irq is enabled */
@@ -27,7 +27,8 @@ struct pending_irq
* whether an irq added to an LR register is PENDING or ACTIVE, the
* following states are just an approximation.
*
- * GIC_IRQ_GUEST_PENDING: the irq is asserted
+ * GIC_IRQ_GUEST_QUEUED: the irq is asserted and queued for
+ * injection into the guest's LRs.
*
* GIC_IRQ_GUEST_VISIBLE: the irq has been added to an LR register,
* therefore the guest is aware of it. From the guest point of view
@@ -35,16 +36,16 @@ struct pending_irq
* or active (after acking the irq).
*
* In order for the state machine to be fully accurate, for level
- * interrupts, we should keep the GIC_IRQ_GUEST_PENDING state until
+ * interrupts, we should keep the interrupt's pending state until
* the guest deactivates the irq. However because we are not sure
- * when that happens, we simply remove the GIC_IRQ_GUEST_PENDING
- * state when we add the irq to an LR register. We add it back when
- * we receive another interrupt notification.
- * Therefore it is possible to set GIC_IRQ_GUEST_PENDING while the
- * irq is GIC_IRQ_GUEST_VISIBLE. We could also change the state of
- * the guest irq in the LR register from active to active and
- * pending, but for simplicity we simply inject a second irq after
- * the guest EOIs the first one.
+ * when that happens, we instead track whether there is an interrupt
+ * queued using GIC_IRQ_GUEST_QUEUED. We clear it when we add it to
+ * an LR register. We set it when we receive another interrupt
+ * notification. Therefore it is possible to set
+ * GIC_IRQ_GUEST_QUEUED while the irq is GIC_IRQ_GUEST_VISIBLE. We
+ * could also change the state of the guest irq in the LR register
+ * from active to active and pending, but for simplicity we simply
+ * inject a second irq after the guest EOIs the first one.
*
*
* An additional state is used to keep track of whether the guest
@@ -54,7 +55,7 @@ struct pending_irq
* level (GICD_ICENABLER/GICD_ISENABLER).
*
*/
-#define GIC_IRQ_GUEST_PENDING 0
+#define GIC_IRQ_GUEST_QUEUED 0
#define GIC_IRQ_GUEST_VISIBLE 1
#define GIC_IRQ_GUEST_ENABLED 2
unsigned long status;
Rename GIC_IRQ_GUEST_PENDING to GIC_IRQ_GUEST_QUEUED and clarify its meaning in xen/include/asm-arm/domain.h. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> --- Changes in v8: - update comment in domain.h to better reflect the renaming. --- xen/arch/arm/gic.c | 4 ++-- xen/arch/arm/vgic.c | 4 ++-- xen/include/asm-arm/domain.h | 23 ++++++++++++----------- 3 files changed, 16 insertions(+), 15 deletions(-)