| Message ID | 1400771902-26553-5-git-send-email-peter.griffin@linaro.org |
|---|---|
| State | New |
| Headers | show |
On Thu, 22 May 2014, Peter Griffin wrote: > This patch adds device tree config for both sdhci controllers > on the stih416 SoC. > > Signed-off-by: Peter Griffin <peter.griffin@linaro.org> > Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> > --- > arch/arm/boot/dts/stih416.dtsi | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi > index 06473c5..a035df0 100644 > --- a/arch/arm/boot/dts/stih416.dtsi > +++ b/arch/arm/boot/dts/stih416.dtsi > @@ -236,5 +236,29 @@ > resets = <&powerdown STIH416_KEYSCAN_POWERDOWN>, > <&softreset STIH416_KEYSCAN_SOFTRESET>; > }; > + > + mmc0: sdhci@fe81e000 { > + compatible = "st,sdhci"; > + status = "disabled"; > + reg = <0xfe81e000 0x1000>; > + interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>; > + interrupt-names = "mmcirq"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_mmc0>; > + clock-names = "mmc"; > + clocks = <&clk_s_a1_ls 1>; > + }; > + > + mmc1: sdhci@fe81f000 { > + compatible = "st,sdhci"; > + status = "disabled"; > + reg = <0xfe81f000 0x1000>; > + interrupts = <GIC_SPI 128 IRQ_TYPE_NONE>; > + interrupt-names = "mmcirq"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_mmc1>; > + clock-names = "mmc"; > + clocks = <&clk_s_a1_ls 8>; > + }; Line these up and make them look pretty too. After that: Acked-by: Lee Jones <lee.jones@linaro.org> > }; > };
diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi index 06473c5..a035df0 100644 --- a/arch/arm/boot/dts/stih416.dtsi +++ b/arch/arm/boot/dts/stih416.dtsi @@ -236,5 +236,29 @@ resets = <&powerdown STIH416_KEYSCAN_POWERDOWN>, <&softreset STIH416_KEYSCAN_SOFTRESET>; }; + + mmc0: sdhci@fe81e000 { + compatible = "st,sdhci"; + status = "disabled"; + reg = <0xfe81e000 0x1000>; + interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>; + interrupt-names = "mmcirq"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mmc0>; + clock-names = "mmc"; + clocks = <&clk_s_a1_ls 1>; + }; + + mmc1: sdhci@fe81f000 { + compatible = "st,sdhci"; + status = "disabled"; + reg = <0xfe81f000 0x1000>; + interrupts = <GIC_SPI 128 IRQ_TYPE_NONE>; + interrupt-names = "mmcirq"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mmc1>; + clock-names = "mmc"; + clocks = <&clk_s_a1_ls 8>; + }; }; };