| Message ID | 20201005225914.315852-4-dmitry.baryshkov@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v1,1/3] dt-bindings: clock: qcom,dispcc: document power domain bindings | expand |
Quoting Dmitry Baryshkov (2020-10-05 15:59:14) > diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c > index 07a98d3f882d..3941054a7b07 100644 > --- a/drivers/clk/qcom/dispcc-sm8250.c > +++ b/drivers/clk/qcom/dispcc-sm8250.c > @@ -963,6 +963,8 @@ static struct gdsc mdss_gdsc = { > }, > .pwrsts = PWRSTS_OFF_ON, > .flags = HW_CTRL, > + .domain = "mmcx", > + .perf_idx = 0, Does a perf_idx of 0 mean off? Or just "not off"?
On 14/10/2020 05:16, Stephen Boyd wrote: > Quoting Dmitry Baryshkov (2020-10-05 15:59:14) >> diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c >> index 07a98d3f882d..3941054a7b07 100644 >> --- a/drivers/clk/qcom/dispcc-sm8250.c >> +++ b/drivers/clk/qcom/dispcc-sm8250.c >> @@ -963,6 +963,8 @@ static struct gdsc mdss_gdsc = { >> }, >> .pwrsts = PWRSTS_OFF_ON, >> .flags = HW_CTRL, >> + .domain = "mmcx", >> + .perf_idx = 0, > > Does a perf_idx of 0 mean off? Or just "not off"? It means 'use performance state with index 0 declared in the DTS'. -- With best wishes Dmitry
diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c index 07a98d3f882d..3941054a7b07 100644 --- a/drivers/clk/qcom/dispcc-sm8250.c +++ b/drivers/clk/qcom/dispcc-sm8250.c @@ -963,6 +963,8 @@ static struct gdsc mdss_gdsc = { }, .pwrsts = PWRSTS_OFF_ON, .flags = HW_CTRL, + .domain = "mmcx", + .perf_idx = 0, }; static struct clk_regmap *disp_cc_sm8250_clocks[] = {
On SM8250 MMCX power domain is required to access MMDS_GDSC registers. Enable using this power domain for the gdsc. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/clk/qcom/dispcc-sm8250.c | 2 ++ 1 file changed, 2 insertions(+) -- 2.28.0