@@ -437,9 +437,13 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins_s0>;
- ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
+ ranges = <0 0 0x08000000 0x10000000 /* CS0 space, 16MB */
+ 255 0 0x50000000 0x36c>; /* GPMC reg */
nand@0,0 {
- reg = <0 0 0>; /* CS0, offset 0 */
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4 /* CS0, I/O window 4 bytes */
+ 255 0 0x36c>; /* GPMC reg */
+ interrupts = <100>;
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
@@ -112,10 +112,14 @@
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins>;
- ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
+ ranges = <0 0 0x08000000 0x10000000 /* CS0 space, 16MB */
+ 255 0 0x50000000 0x36c>; /* GPMC reg */
nand@0,0 {
- reg = <0 0 0>; /* CS0, offset 0 */
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4 /* CS0, I/O window 4 bytes */
+ 255 0 0x36c>; /* GPMC reg */
+ interrupts = <100>;
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
gpmc,device-width = <1>;
@@ -268,9 +268,13 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nand_flash_x8>;
- ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
+ ranges = <0 0 0x08000000 0x10000000 /* CS0 space, 16MB */
+ 255 0 0x50000000 0x36c>; /* GPMC reg */
nand@0,0 {
- reg = <0 0 0>; /* CS0, offset 0 */
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4 /* CS0, I/O window 4 bytes */
+ 255 0 0x36c>; /* GPMC reg */
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
@@ -106,10 +106,15 @@
};
&gpmc {
- ranges = <0 0 0x30000000 0x04>; /* CS0: NAND */
+ ranges = <0 0 0x30000000 0x1000000 /* CS0 space, 16MB */
+ 255 0 0x6e000000 0x02d4>; /* register space */
+ /* Chip select 0 */
nand@0,0 {
- reg = <0 0 0>; /* CS0, offset 0 */
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4 /* NAND I/O window, 4 bytes */
+ 255 0 0x02d4>; /* GPMC register space */
+ interrupts = <20>;
nand-bus-width = <16>;
gpmc,sync-clk-ps = <0>;
@@ -95,12 +95,16 @@
};
&gpmc {
- ranges = <0 0 0x00000000 0x20000000>,
- <5 0 0x2c000000 0x01000000>;
+ ranges = <0 0 0x00000000 0x1000000 /* CS0 space, 16MB */
+ 5 0 0x2c000000 0x1000000 /* CS5 space, 16MB */
+ 255 0 0x6e000000 0x02d4>; /* GPMC reg */
nand@0,0 {
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4 /* CS0, I/O window, 4 bytes */
+ 255 0 0x02d4>; /* GPMC reg */
+ interrupts = <20>;
linux,mtd-name= "hynix,h8kds0un0mer-4em";
- reg = <0 0 0>;
nand-bus-width = <16>;
ti,nand-ecc-opt = "bch8";
@@ -197,12 +197,16 @@
};
&gpmc {
- ranges = <0 0 0x00000000 0x20000000>,
- <5 0 0x2c000000 0x01000000>;
+ ranges = <0 0 0x00000000 0x1000000 /* CS0 space, 16MB */
+ 5 0 0x2c000000 0x1000000 /* CS5 space, 16MB */
+ 255 0 0x6e000000 0x02d4>; /* GPMC reg */
nand@0,0 {
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4 /* CS0, I/O window, 4 bytes */
+ 255 0 0x02d4>; /* GPMC reg */
+ interrupts = <20>;
linux,mtd-name= "micron,mt29c4g96maz";
- reg = <0 0 0>;
nand-bus-width = <16>;
ti,nand-ecc-opt = "bch8";
@@ -55,11 +55,15 @@
};
&gpmc {
- ranges = <0 0 0x00000000 0x20000000>;
+ ranges = <0 0 0x00000000 0x1000000 /* CS0 space, 16MB */
+ 255 0 0x6e000000 0x02d4>; /* GPMC reg */
nand@0,0 {
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4 /* CS0, I/O window, 4 bytes */
+ 255 0 0x02d4>; /* GPMC reg */
+ interrupts = <20>;
linux,mtd-name= "micron,mt29c4g96maz";
- reg = <0 0 0>;
nand-bus-width = <16>;
ti,nand-ecc-opt = "bch8";
@@ -96,12 +96,16 @@
};
&gpmc {
- ranges = <0 0 0x00000000 0x01000000>,
- <1 0 0x08000000 0x01000000>;
+ ranges = <0 0 0x00000000 0x1000000 /* CS0 space, 16MB */
+ 1 0 0x08000000 0x1000000 /* CS1 space, 16MB */
+ 255 0 0x6e000000 0x02d4>; /* GPMC reg */
nand@0,0 {
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4 /* CS0, I/O window, 4 bytes */
+ 255 0 0x02d4>; /* GPMC reg */
+ interrupts = <20>;
linux,mtd-name= "micron,nand";
- reg = <0 0 0>;
nand-bus-width = <16>;
ti,nand-ecc-opt = "bch8";
@@ -358,11 +358,15 @@
};
&gpmc {
- ranges = <0 0 0x30000000 0x1000000>,
- <7 0 0x15000000 0x01000000>;
+ ranges = <0 0 0x30000000 0x1000000
+ 7 0 0x15000000 0x1000000
+ 255 0 0x6e000000 0x02d4>; /* GPMC reg */
nand@0,0 {
- reg = <0 0 0x1000000>;
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4 /* CS0, I/O window, 4 bytes */
+ 255 0 0x02d4>; /* GPMC reg */
+ interrupts = <20>;
nand-bus-width = <16>;
ti,nand-ecc-opt = "bch8";
/* no elm on omap3 */
@@ -128,9 +128,10 @@
};
&gpmc {
- ranges = <0 0 0x30000000 0x1000000>, /* nand assigned by COM a83x */
- <4 0 0x20000000 0x01000000>,
- <7 0 0x15000000 0x01000000>; /* eth assigend by COM a83x */
+ ranges = <0 0 0x30000000 0x1000000 /* nand assigned by COM a83x */
+ 4 0 0x20000000 0x1000000
+ 7 0 0x15000000 0x1000000 /* eth assigend by COM a83x */
+ 255 0 0x6e000000 0x02d4>; /* GPMC reg */
ethernet@4,0 {
compatible = "smsc,lan9117", "smsc,lan9115";
@@ -52,7 +52,8 @@
&gpmc {
ranges = <0 0 0x10000000 0x08000000>,
<1 0 0x28000000 0x08000000>,
- <2 0 0x20000000 0x10000000>;
+ <2 0 0x20000000 0x10000000>,
+ <255 0 0x6e000000 0x02d4>; /* GPMC reg */
nor@0,0 {
compatible = "cfi-flash";
@@ -103,10 +104,13 @@
};
nand@1,0 {
+ compatible = "ti,omap2-nand";
+ reg = <1 0 4 /* CS1, I/O window, 4 bytes */
+ 255 0 0x02d4>; /* GPMC reg */
+ interrupts = <20>;
linux,mtd-name= "micron,mt29f1g08abb";
#address-cells = <1>;
#size-cells = <1>;
- reg = <1 0 0x08000000>;
ti,nand-ecc-opt = "ham1";
nand-bus-width = <8>;
gpmc,cs-on-ns = <0>;
Add compatible id, GPMC register resource and interrupt resource to NAND controller nodes. Signed-off-by: Roger Quadros <rogerq@ti.com> --- arch/arm/boot/dts/am335x-evm.dts | 8 ++++++-- arch/arm/boot/dts/am335x-igep0033.dtsi | 8 ++++++-- arch/arm/boot/dts/am43x-epos-evm.dts | 8 ++++++-- arch/arm/boot/dts/omap3-devkit8000.dts | 9 +++++++-- arch/arm/boot/dts/omap3-evm-37xx.dts | 10 +++++++--- arch/arm/boot/dts/omap3-igep0020.dts | 10 +++++++--- arch/arm/boot/dts/omap3-igep0030.dts | 8 ++++++-- arch/arm/boot/dts/omap3-ldp.dts | 10 +++++++--- arch/arm/boot/dts/omap3-lilly-a83x.dtsi | 10 +++++++--- arch/arm/boot/dts/omap3-lilly-dbb056.dts | 7 ++++--- arch/arm/boot/dts/omap3430-sdp.dts | 8 ++++++-- 11 files changed, 69 insertions(+), 27 deletions(-)